MT48LC64M8A2TG-7E:C Micron Technology Inc, MT48LC64M8A2TG-7E:C Datasheet - Page 54
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MT48LC64M8A2TG-7E:C
Manufacturer Part Number
MT48LC64M8A2TG-7E:C
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC64M8A2TG-7EC.pdf
(68 pages)
Specifications of MT48LC64M8A2TG-7E:C
Organization
64Mx8
Density
512Mb
Address Bus
15b
Access Time (max)
5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
125mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Figure 38:
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
DQML, DQMU
COMMAND
BA0, BA1
A11, A12
A0–A9,
DQM/
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
READ – Without Auto Precharge
ACTIVE
T0
ROW
ROW
BANK
t CKH
t CMH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
1. For this example, BL = 4, CL = 2, and the READ burst is followed by a “manual” PRECHARGE.
2. x16: A11 and A12 = “Don’t Care”; x8: A12 = “Don’t Care.”
NOP
DISABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m 2
T2
BANK
READ
t CH
t CMH
CAS Latency
T3
NOP
t LZ
t AC
54
T4
NOP
D
OUT
t OH
t AC
m
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T5
OUT
NOP
m + 1
t OH
t AC
SINGLE BANK
PRECHARGE
ALL BANKS
D
BANK
T6
512Mb: x4, x8, x16 SDRAM
OUT
t OH
m + 2
t RP
t AC
©2000 Micron Technology, Inc. All rights reserved.
D
T7
NOP
OUT
t OH
m + 3
Timing Diagrams
t HZ
ROW
BANK
T8
ROW
ACTIVE
Don’t Care
Undefined