MT48LC64M8A2TG-7E:C Micron Technology Inc, MT48LC64M8A2TG-7E:C Datasheet - Page 56
![no-image](/images/manufacturer_photos/0/4/441/micron_technology_inc_sml.jpg)
MT48LC64M8A2TG-7E:C
Manufacturer Part Number
MT48LC64M8A2TG-7E:C
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC64M8A2TG-7EC.pdf
(68 pages)
Specifications of MT48LC64M8A2TG-7E:C
Organization
64Mx8
Density
512Mb
Address Bus
15b
Access Time (max)
5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
125mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
Figure 40:
PDF: 09005aef809bf8f3/Source: 09005aef80818a4a
512MbSDRAM.fm - Rev. L 10/07 EN
DQML, DQMH
COMMAND
BA0, BA1
A11, A12
A0–A9,
DQM/
CLK
CKE
A10
DQ
t CMS
t CKS
t AS
t AS
t AS
Single READ – Without Auto Precharge
ACTIVE
ROW
ROW
BANK
T0
t CMH
t CKH
t AH
t AH
t AH
Notes:
t RCD
t RAS
t RC
t CK
T1
NOP
1. For this example, BL = 1, CL = 2, and the READ burst is followed by a “manual” PRECHARGE.
2. x16: A11 and A12 = “Don’t Care”; x8: A12 = “Don’t Care.”
DISABLE AUTO PRECHARGE
t CMS
t CL
COLUMN m
BANK
T2
READ
t CMH
t CH
CAS Latency
2
T3
NOP
t LZ
t AC
56
T4
D
NOP
OUT
t OH
t HZ
m
Micron Technology, Inc., reserves the right to change products or specifications without notice.
SINGLE BANKS
PRECHARGE
ALL BANKS
BANK(S)
T5
t RP
T6
NOP
512Mb: x4, x8, x16 SDRAM
©2000 Micron Technology, Inc. All rights reserved.
ACTIVE
BANK
ROW
T7
ROW
Timing Diagrams
T8
NOP
Don’t Care
Undefined