MT16JTF25664AZ-1G4F1 Micron Technology Inc, MT16JTF25664AZ-1G4F1 Datasheet - Page 13

• Manufacturer Part Number: MT16JTF25664AZ-1G4F1
• Manufacturer: Micron Technology Inc

Specifications of MT16JTF25664AZ-1G4F1

• Main Category: DRAM Module
• Module Type: 240UDIMM
• Device Core Size: 64b
• Organization: 256Mx64
• Total Density: 17179869184
• Number Of Elements: 8
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Pin Count: 240
• Mounting: Socket
• Lead Free Status / Rohs Status: Compliant

Serial Presence-Detect EEPROM
Table 13:
Table 14:
Serial Presence-Detect Data
PDF: 09005aef837cdd2d/Source: 09005aef837cdc74
JTF16C_256_512x64AZ.fm - Rev. A 2/09 EN
Parameter/Condition
Parameter/Condition
Supply voltage
Input high voltage: Logic 1; All inputs
Input low voltage: Logic 0; All inputs
Output low voltage: Iout = 3mA
Input leakage current: Vin = GND to Vdd
Output leakage current: Vout = GND to Vdd
Standby current
Power supply current, READ: SCL clock frequency = 100 kHz
Power supply current, WRITE: SCL clock frequency = 100 kHz
SCL LOW to SDA data-out valid
Time the bus must be free before a new transition can start
Data-out hold time
SDA and SCL fall time
SDA and SCL rise time
Data-in hold time
Start condition hold time
Clock HIGH period
Noise suppression time constant at SCL, SDA inputs
Clock LOW period
SCL clock frequency
Data-in setup time
Start condition setup time
Stop condition setup time
WRITE cycle time
Serial Presence-Detect EEPROM DC Operating Conditions
All voltages referenced to Vss
Serial Presence-Detect EEPROM AC Operating Conditions
All voltages referenced to Vss
Notes:
1. To avoid spurious start and stop conditions, a minimum delay is placed between SCL = 1 and
2. This parameter is sampled.
3. For a restart condition, or following a WRITE cycle.
4. The SPD EEPROM WRITE cycle time (
For the latest serial presence-detect data, refer to Micron’s SPD page:
www.micron.com/SPD
the falling or rising edge of SDA.
sequence to the end of the EEPROM internal ERASE/PROGRAM cycle. During the WRITE
cycle, the EEPROM bus interface circuit is disabled, SDA remains HIGH due to pull-up resis-
tance, and the EEPROM does not respond to its slave address.
2GB, 4GB (x64, DR): 240-Pin DDR3 SDRAM UDIMM
13
t
Symbol
Symbol
t
t
t
Vddspd
t
HD:DAT
HD:STA
SU:DAT
SU:STA
SU:STO
t
t
t
t
t
HIGH
Iccw
LOW
f
WRC
t
t
WRC) is the time from a valid stop condition of a write
Vih
Iccr
BUF
Vol
V
Isb
SCL
Ilo
AA
DH
t
Ili
t
t
R
F
I
IL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Serial Presence-Detect EEPROM
Vddspd × 0.7
Min
200
100
0.2
1.3
0.6
0.6
1.3
0.6
0.6
–
–
0
–
–
–
Min
–0.6
0.05
3.0
0.1
1.6
0.4
2.0
–
Max
300
300
400
0.9
50
10
–
–
–
–
–
–
–
–
–
©2008 Micron Technology, Inc. All rights reserved.
Vddspd + 0.5
Vddspd × 0.3
Max
3.6
0.4
3.0
3.0
4.0
1.0
3.0
Units
kHz
ms
µs
µs
ns
ns
ns
µs
µs
µs
ns
µs
ns
µs
µs
Notes
Units
mA
mA
µA
µA
µA
1
2
2
3
4
V
V
V
V