ADP3810AR-16.8 Analog Devices Inc, ADP3810AR-16.8 Datasheet - Page 14

• Manufacturer Part Number: ADP3810AR-16.8
• Manufacturer: Analog Devices Inc
• Type: Battery Chargerr

Specifications of ADP3810AR-16.8

• Output Voltage: 16.8V
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 16V
• Operating Temp Range: -40C to 85C
• Package Type: SOIC N
• Mounting: Surface Mount
• Pin Count: 8
• Operating Temperature Classification: Industrial
• Lead Free Status / Rohs Status: Not Compliant

In reality, the interaction of CFI and CP2and their ESRs create
of CFI) and RF2(ESR of CP2)are similar, they tend to cancel
each other out. Furthermore, the loop crossover is an order of
magnitude lower in frequency, so the additional pole and zero
have little effect on the loop response.
ADP3811's CaMP pin and the gain from the CaMP pin back
Loop Gain:
Modulator Pole:
Step 1. Calculate the dc loop gain (GwOP),fpM'
an additional pole/zero pair, but because the value of RFI (ESR
ADP3810/ADP3811
either present or absent. If the battery is present, its large ca-
pacitance creates a very low frequency dominant pole, giving a
single pole system. The more demanding case is when the bat-
tery is removed. Now the output pole is dependent upon the
filter capacitors, CPI and CP2. This pole is higher in frequency,
and more care must be taken to stabilize the loop response. All
three cases are described in detail below.
The following calculations for compensation components help
to realize stable voltage and current loops. In practical designs,
checking the stability using a network analyzer or a Feedback
Loop Analyzer is always recommended. The calculated compo-
nent values serve as good starting values for a measurement-
based optimization. The component values shown in Figure 23
are slightly different from the calculated values based on this
optimization procedure.
To simplify the analysis further, the loop gain is split into two
components: the gain from the battery to the ADP3810/
to the battery. Because the compensation of each loop depends
upon the RC netWork on the CaMP pin, it is a convenient
choice for dividing the loop calculations.
Definitions:
Modulator Gain: GMOD
Error Amplifier:
Modulator Zero: fzM, The zero due to the ESR, Rpl' of the
Voltage Loop Compensation,
GEA =20xlog
fpM
GMOD
GMOD=20xlog[GM3xITXoc
=
fZM
2nxR4x(CPI +CP2) 2nX1.2kQx(1.22mF)
=
=
20 x log
GLOOP
2nxRplxCPI
GEA =20XIOg[ RI~2R2XGM2XR5]
[
80kQ+20kQ
VBAT.
GEA
Gwop
fPM,The pole present at the output of the
modulator.
filter cap, CFI.
I
I
=
[
20kQ
0.333 x 0.091 A / V x 1.2 kQ
6 mA / V x 0.36 x 3.3 kQ x
44.5 dB + 48.3 dB
=
=
gain in dB from VBATto the CaMP pin.
=
gain in dB from the CaMP pin to
GMOD +
-
2nxO.IQx1.0mF
No Battery
x2.lmA/Vx400kQ
~.
xRpxAv2XGM4xR4]
I
=
I
96.8 dB
-1.6kHz
]
andf2M:
=
]
48.3 dB
=48.5dB
-O.l1Hz
-14-
be realized with an external compensation capacitor, CCI' that
Step 6. Calculate CCI based upon /po'
Step 7. Calculate the loop phase margin, <11M:
The loop phase margin is a combination of the phase of the
Step 8. Calculate RcI to stabilize the loop:
The sum of phase losses of the modulator and error amplifier re-
ity. To stabilize the feedback loop, we have to add a phase
boosting zero to the error amplifier by inserting a resistor (Rei)
in series with the capacitor CCI. If the desired phase margin is
<11M
From this, the Rei resistor is calculated:
To avoid interference betWeen the voltage loop and the current
fast current limiting response time, so pick fcv
Step 3. Calculate GMOD atfev:
The modulator gain of 46.7 dB is the dc gain. The modulator
pole reduces this gain above fPM.
Step 4. Calculate gain loss of GEAat fcv:
To have the feedback loop gain cross over 0 dB at fCv
Step 5. Determine
To achieve this Choss we need to add a pole, which is located at
gain at 100 Hz. Its first parasitic pole occurs at approximately
sets the pole, fpI.
modulator pole and zero and the error amplifier pole.
sults in a loop phase of 0°, which is unacceptable for loop stabil-
Step 2. Pick the voltage and current loop crossover frequen-
cies, fev and fe/:
loop, use fcv < 1/10 offcl> the current loop crossover. The cur-
rent loop crossover
~
~
the CaMP pin. GM2 has practically no parasitic loss in
500 kHz as shown in Figure II. Thus, the entire gain loss must
GLOSS
«PM=180-aretan
=
GMOD (100Hz)=48.3dB-20xlog,/I+
(100 Hz) should be +10.9 dB. Thus, the total gain loss of
needed at crossover is:
60 degrees, the frequency of the zero can be calculated:
=
GMOD(100 Hz)= GMOD(de)-20XIOg,/I+
GEA (de) - GEA (100
Ccl
fpI
Rei
fCI is chosen
fp
fzl
(
-
fcv
needed to achieve GLosS:
=
fpI
=
=
2nx R5x fPl
2nxfzlxCci
!cvltan
,
10
) {
-areta
(
GLOSS
fcv
Hz)
10
I
I
to be
<11M
)
=
-I
48.5 dB - 10.9 dB
=
-
fpM
fcv
-1. 3Hz
",0.3j.LF
-
57 Hz
",IOkQ
1.9 kHz to provide
)
( )
+aretan -
-
0.11
100
-
(
2
100 Hz.
fcv
fpM
=-10.9dB
(
fZM
fcv
=
)
=
2
37.6 dB
)
100 Hz,
REV. 0
"'0°
a