L-ET1011C2-CI-D LSI, L-ET1011C2-CI-D Datasheet - Page 10

• Manufacturer Part Number: L-ET1011C2-CI-D
• Manufacturer: LSI

Specifications of L-ET1011C2-CI-D

• Number Of Receivers: 1
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Lead Free Status / Rohs Status: Compliant

Gigabit Ethernet Transceiver
Functional Description
Analog Loopback
Analog loopback provides the ability to loop the transmitted signal back to the receiver within the AFE. The point at which the
signal is looped back is selected using the loopback control register with the following options being provided: replica and line
driver.
Selecting the replica option causes the transmitted signal to be looped back through the replica generation circuitry of the on-
chip hybrid, thereby allowing most of the digital and analog circuitry to be exercised. This loopback mode may be used even
when the device is connected to a network because nothing is transmitted to or received from the MDI in this case.
Line driver loopback transmits data to and receives data from the MDI. However, in general, this loopback may not be used
when the device is connected to a network because it could cause an unanticipated response from the link partner. Line driver
loopback requires 100 Ω terminations to be present on the line side of the transformer for each wire pair. For example, for wire
pair A, connect a 100 Ω resistor between the leads (pins 1 and 2) of a short cable plugged into the RJ45. This should also be
done for wire pairs B, C, and D. Another way to accomplish this is to connect to a link partner with a short cable and power-
down the link partner. Figure 4 shows a block diagram of both replica and line driver loopbacks.
External Cable Loopback
External cable loopback loops GMII Tx to GMII Rx via complete digital and analog path and via an external cable.
The external cable should have pair A (pins 1 and 2) looped to pair B (pins 3 and 6), and pair C (pins 4 and 5)
looped to pair D (pins 7 and 8). This will test all the digital data paths and all the analog circuits. Figure 5 shows a
block diagram of external cable loopback
10
Switch
MAC /
Switch
MAC /
(continued)
M
G
Figure 4. Replica and Line Driver Analog Loopback
I
I
M
G
I
I
Figure 5. External Cable Loopback
Digital
Digital
PHY
PHY
PHY
AFE
PHY
AFE
REPLICA LOOPBACK
LINE DRIVER LOOPBACK
September 2007
LSI Corporation
RJ-45
RJ-45