PEF2054NV21XT Lantiq, PEF2054NV21XT Datasheet - Page 162
PEF2054NV21XT
Manufacturer Part Number
PEF2054NV21XT
Description
Manufacturer
Lantiq
Datasheet
1.PEF2054NV21XT.pdf
(269 pages)
Specifications of PEF2054NV21XT
Lead Free Status / Rohs Status
Compliant
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W:MAAR
W:MACR
Downstream: CFI port 1, time slot 7, bits 7 … 0 from PCM port 0, time slot 0, bits 7 … 0
W:MADR
W:MAAR
W:MACR
The following sequence sets transmit time slot 0 of PCM port 0 to high impedance:
W:MADR
W:MAAR
W:MACR
Example
In PCM mode 0 and CFI mode 0 the following non-transparent CFI to CFI loop via PCM
port 0, time slot 0 shall be programmed:
Upstream: CFI port 2, time slot 4, bits 7 … 0 to PCM port 0, time slot 0, bits 7 … 0
W:MADR
Semiconductor Group
= 1000 0000
= 1001 0100
= 0111 0001
= 1000 0000
= 0001 1011
= 0111 0001
= 0000 0000
= 1000 0000
= 0110 0000
B
B
B
B
B
B
B
B
B
PCM time slot encoding (pointer to upstream DM)
CFI time slot encoding (address of upstream CM)
CM code for switching a 64 kbit/s/bits 7 … 0
channel (0001)
PCM time slot encoding (pointer to upstream DM)
CFI time slot encoding (address of downstream CM)
CM code for switching a 64 kbit/s/bits 7 … 0
channel (0001)
all bits to high Z
PCM time slot encoding
MOC code to access the tristate field
162
Application Hints
PEB 2055
PEF 2055
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