GCIXP1240AB 837151 Intel, GCIXP1240AB 837151 Datasheet - Page 32
GCIXP1240AB 837151
Manufacturer Part Number
GCIXP1240AB 837151
Description
Manufacturer
Intel
Datasheet
1.GCIXP1240AB_837151.pdf
(146 pages)
Specifications of GCIXP1240AB 837151
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32
Table 14. SDRAM Interface Pins (Continued)
®
IXP1240 Network Processor
RAS_L
CAS_L
WE_L
DQM
SDCLK
Totals:
Signal Names
Interface
SDRAM
[25]
[24]
[23]
[22]
[21]
[20]
[19]
[18]
[17]
[16]
[15]
[14]
[13]
[12]
[10]
[11]
[9]
[8]
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
L1
L2
M4
L3
K1
K3
J1
J2
J3
H1
H2
J4
H3
G1
G2
H4
G3
F1
F2
F3
E1
E2
F4
E3
D1
D2
W2
W1
V3
W3
AD2
Pin #
O4
O4
O4
O4
O3
Type
1
1
1
1
1
84
Total
Row Address Select output.
Precharge cycle indicated if asserted with WE_L.
Column Address Select output.
Write Enable output.
SDRAM data control output. SDRAMs use this signal to enable
their data buffers to drive MDATA[63:0] on reads, or enable the
SDRAM to accept input data from MDATA[63:0] for writes.
SDRAM Clock output. Frequency is one half the speed of the
core clock (½ * F
core
).
Pin Descriptions
Datasheet
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