GWIXP465BAB Intel, GWIXP465BAB Datasheet - Page 74
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GWIXP465BAB
Manufacturer Part Number
GWIXP465BAB
Description
Manufacturer
Intel
Datasheet
1.GWIXP465BAB.pdf
(163 pages)
Specifications of GWIXP465BAB
Core Operating Frequency
266MHz
Operating Supply Voltage (typ)
1.3/1.5/2.5/3.3V
Operating Supply Voltage (max)
1.575/2.7/3.465V
Operating Supply Voltage (min)
1.235/2.3/3.135V
Package Type
BGA
Pin Count
544
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
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Package Information
Table 16.
May 2005
74
ETHC_RXCLK
ETHC_RXDATA[3:1]
ETHC_RXDATA[0] /
SMII_RXDATA[5]
ETHC_RXDV
NOTE: This table discusses all features supported on the Intel
† For a legend of the Type codes, see
†† Please refer to Intel
Name
see
Table 1 on page
MII/SMII Interfaces (Sheet 7 of 8)
®
IXP45X and Intel
Power
Reset
on
Z
Z
Z
Z
14.
†
Reset
VI
VI
VI
VI
Table 10 on page
®
†
IXP46X Product Line of Network Processors Developer’s Manual for information on how to select the interface desired
Software
Enables
Normal
Reset
After
Until
VI
VI
VI
VI
46.
Software
Enables
Normal
After
®
VI
VI
VI
VI
IXP45X and Intel
Type
I
I
I
I
†
Externally supplied receive clock.
This MAC contains hardware hashing capabilities local to the interface.
Should be pulled high through a 10-KΩ resistor when not being utilized in the system or when in
SMII mode of operation.
Receive data bus from PHY, data sampled synchronously, with respect to ETHC_RXCLK. This
MAC contains hardware hashing capabilities local to the interface.
Should be pulled high through a 10-KΩ resistor when not being utilized in the system or when in
SMII mode of operation.
MII Mode of Operation:
Receive data bus from PHY, data sampled synchronously, with respect to ETHC_RXCLK. This
MAC contains hardware hashing capabilities local to the interface
SMII Mode of Operation:
The data on this signal is received synchronously with respect to the rising edge of SMII_CLK
when operating as an SMII interface and synchronously with respect to the rising edge of
SMII_RXCLK when operating as a Source Synchronous SMII interface
Should be pulled high through a 10-KΩ resistor when not being utilized in the system.
Receive data valid, used to inform the MII interface that the Ethernet PHY is sending data.
This MAC contains hardware hashing capabilities local to the interface.
Should be pulled high through a 10-KΩ resistor when not being utilized in the system.
®
• 25 MHz for 100 Mbps operation
• 2.5 MHz for 10 Mbps
• Not used when operating in SMII mode of operation.
IXP46X Product Line of Network Processors. For details on feature support listed by processor,
Intel
®
IXP45X and Intel
®
Description
IXP46X Product Line of Network Processors Datasheet
Document Number:
306261-002
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