GWIXP465BAB Intel, GWIXP465BAB Datasheet - Page 76
GWIXP465BAB
Manufacturer Part Number
GWIXP465BAB
Description
Manufacturer
Intel
Datasheet
1.GWIXP465BAB.pdf
(163 pages)
Specifications of GWIXP465BAB
Core Operating Frequency
266MHz
Operating Supply Voltage (typ)
1.3/1.5/2.5/3.3V
Operating Supply Voltage (max)
1.575/2.7/3.465V
Operating Supply Voltage (min)
1.235/2.3/3.135V
Package Type
BGA
Pin Count
544
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
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Table 17.
May 2005
76
EX_CLK
EX_ALE
EX_ADDR[24:0]
EX_WR_N
EX_RD_N
NOTE: This table discusses all features supported on the Intel
† For a legend of the Type codes, see
Name
processor, see
Expansion Bus Interface (Sheet 1 of 4)
Power
Reset
Table 1 on page
on
H
H
H
H
Z
†
Reset
VI
H
H
H
H
†
Table 10 on page
14.
Software
Enables
Normal
Reset
After
Until
VO
VB
VB
VB
VI
Software
Enables
Normal
VO / Z
46.
After
VB
VB
VB
VI
®
IXP45X and Intel
Type
TRI
I/O
I/O
I/O
I
†
Input clock signal used to sample all expansion interface inputs and clock all expansion interface
outputs.
Expansion bus Address-latch enable used for multiplexed address/data bus accesses, as an
Advance pin for Intel synchronous modes of operation/ZBT SRAM mode of operation, and LD_N for
ZBT SRAM. EX_ALE is always used by outbound transfers.
Expansion bus address used as an output for data accesses over the expansion bus when
executing outbound transactions and used as an input for data accesses over the expansion bus
when executing inbound transactions. Also, used as an input during reset to capture device
configuration. These signals have a weak pull-up resistor attached internally. Based on the desired
configuration, various address signals must be tied low in order for the device to operate in the
desired mode. A 10K ohm pull down resistor is required to override these pull-up resistors. These
pull-ups are disabled when PLL_LOCK is asserted and the IXP45X/IXP46X network processors
drive the signal based upon grant. EX_ADDR is driven by IXP45X/IXP46X network processors
except when grant is asserted to an external master or during reset.
Very Important Note: See Intel
Processors Developer’s Manual for additional details on address strapping.
Expansion bus write enable signal is used as an Intel-mode write strobe / Motorola-mode data
strobe (EXP_MOT_DS_N) / TI*-mode data strobe (TI_HDS1_N) / ZBT SRAM mode read/
write_n(ZBT_RD_WR_N) for outbound transactions. This signal is an output for outbound
transactions.
Expansion bus write enable signal is used as a write enable signal to the IXP45X/IXP46X network
processors for inbound transaction support. This signal is an input for inbound transactions.
EX_WR_N is driven by IXP45X/IXP46X network processors unless grant is asserted to an external
master
Expansion bus read enable signal is used as an Intel-mode read strobe / Motorola-mode read-not-
write (EXPB_MOT_RNW) / TI mode read-not-write (TI_HR_W_N) / ZBT SRAM mode output enable
(ZBT_OE_N) for outbound transactions. This signal is an output for outbound transactions.
Expansion bus read enable signal is used as a read enable signal to the IXP45X/IXP46X network
processors for inbound transaction support. This signal is an input for inbound transactions.
EX_RD_N is driven by IXP45X/IXP46X network processors unless grant is asserted to an external
master.
®
IXP46X Product Line of Network Processors. For details on feature support listed by
Intel
®
IXP45X and Intel
®
IXP45X and Intel
®
Description
IXP46X Product Line of Network Processors Datasheet
®
IXP46X Product Line of Network
Document Number:
306261-002
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