LQ10D368 Sharp Electronics, LQ10D368 Datasheet - Page 9

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LQ10D368

Manufacturer Part Number
LQ10D368
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LQ10D368

Lead Free Status / Rohs Status
Compliant

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7. Timing Characteristics of input signals
7-2. Horizontal display position
7-3. Vertical display position
Timing diagrams of input signal are shown in Fig.2 -
7-1. Timing characteristics
Note) In case of lower frequency, the deterioration of display quality, flicker etc.,may be occurred.
to the rising edge of ENAB signal is displayed at the left end of the active area.
Note) When ENAB is fixed "Low", the display starts from the data of C104(clock) as shown
Enable signal Setup time
Hsync-Enable signal
phase difference
Clock
Data
Horizontal
sync. signal
Vertical
sync. signal
Horizontal display period
Hsync-Clock
phase difference
Hsync-Vsync
phase difference
The horizontal display position is determined by ENAB signal and the input data corresponding
When the phase difference is below 104 clock, keep the “High level of ENAB is signal longer
Than 104-The. If it will not be keeped, the display starts from the data of C104(clock).
in Fig.2-
Parameter
Parameter
Pulsewidth
Pulse width
Frequency
High time
Low time
Setup time
Hold time
Cycle
Pulse width
Cycle
. Be careful that the module does not work when ENAB is fixed "High".
Symbol Mode
symbol
THe
1/Tc
THp
TVp
TVh
THd
THc
Tep
Tch
Tdh
Tes
Tds
Tcl
TH
TV
Min.
480
400
350
all
all
44
5
2
30.00
Min.
750
515
446
447
640
10
10
10
Typ.
5
5
2
1
0
640
25.18
31.78
TH-664 clock
Typ.
800
525
449
449
640
Tc-10
96
Max.
640
.
TH-THp clock
Tc-10
28.33
Max.
clock
900
200
560
480
510
640
Unit
34
ns
Remark
clock
clock
clock
MHz
Unit
line
line
line
line
ns
ns
ns
ns
ns
s
Remark

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