COM20020I3V-HT Standard Microsystems (SMSC), COM20020I3V-HT Datasheet - Page 27

• Manufacturer Part Number: COM20020I3V-HT
• Manufacturer: Standard Microsystems (SMSC)

Specifications of COM20020I3V-HT

• Number Of Transceivers: 1
• Operating Supply Voltage (typ): 3.3V
• Operating Temperature (max): 85C
• Operating Temperature (min): -40C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Compliant

5Mbps ARCNET (ANSI 878.1) Controller with 2K x 8 On-Chip RAM
Sub-Address Register
The sub-address register is new to the COM20020I, previously a reserved register. Bits 2, 1 and 0 are used to select
one of the registers assigned to address 7h. SUBAD1 and SUBAD0 already exist in the Configuration register on the
COM20020IB. They are exactly same as those in the Sub-Address register. If the SUBAD1 and SUBAD0 bits in the
Configuration register are changed,
SUBAD2 is a new sub-address bit. It Is used to access the 1 new Set Up register, SETUP2. This register is selected
by setting SUBAD2=1. The SUBAD2 bit is cleared automatically by writing the Configuration register.
Setup 1 Register
The Setup 1 Register is a read/write 8-bit register accessed when the Sub Address Bits are set up accordingly (see the
bit definitions of the Configuration Register). The Setup 1 Register allows the user to change the network speed (data
rate) or the arbitration speed independently, invoke the Receive All feature and change the nPULSE1 driver type. The
data rate may be slowed to 156.25Kbps and/or the arbitration speed may be slowed by a factor of two. The Setup 1
Register defaults to the value 0000 0000 upon hardware reset only.
Setup 2 Register
The Setup 2 Register is new to the COM20020I. It is an 8-bit read/write register accessed when the Sub Address Bits
SUBAD[2:0] are set up accordingly (see the bit definitions of the Sub Address Register). This register contains bits for
various functions. The CKUP1,0 bits select the clock to be generated from the 20 MHz crystal. The RBUSTMG bit is
used to Disable/Enable Fast Read function for High Speed CPU bus support. The EF bit is used to enable the new
timing for certain functions in the COM20020I (if EF = 0, the timing is the same as in the COM20020I Rev. B). See
Appendix “A”. The NOSYNC bit is used to enable the NOSYNC function during initialization. If this bit is reset, the
line has to be idle for the RAM initialization sequence to be written. If set, the line does not have to be idle for the
initialization sequence to be written. See Appendix “A”.
The RCNTM[1,0] bits are used to set the time-out period of the recon timer. Programming this timer for shorter time
periods has the benefit of shortened network reconfiguration periods. The time periods shown in the table on the
following page are limited by a maximum number of nodes in the network. These time-out period values are for
5Mbps. For other data rates, scale the time-out period time values accordingly; the maximum node count remains the
same.
SMSC COM20020I 3.3V
Note*: The node ID value 255 must exist in the network for the 26.25 mS time-out to be valid.
RCNTM1
0
0
1
1
the SUBAD1and SUBAD0 in the Sub-Address register are also changed.
RCNTM0
0
1
0
1
DATASHEET
420 mS
105 mS
52.5 mS
26.25 mS*
TIME-OUT
Page 27
PERIOD
Up to 255 nodes
Up to 64 nodes
Up to 32 nodes
Up to 16 nodes*
MAX NODE
COUNT
Revision 12-06-06