SC2200UFH233F33 AMD (ADVANCED MICRO DEVICES), SC2200UFH233F33 Datasheet - Page 295
SC2200UFH233F33
Manufacturer Part Number
SC2200UFH233F33
Description
Manufacturer
AMD (ADVANCED MICRO DEVICES)
Datasheet
1.SC2200UFH233F33.pdf
(429 pages)
Specifications of SC2200UFH233F33
Operating Temperature (min)
0C
Operating Temperature (max)
85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Lead Free Status / Rohs Status
Compliant
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Core Logic Module - ISA Legacy Register Space
AMD Geode™ SC2200 Processor Data Book
I/O Port 00Bh
I/O Port 00Ch
I/O Port 00Dh
I/O Port 00Eh
I/O Port 00Fh
I/O Port 0C0h
Not used.
I/O Port 0C2h
Not used.
I/O Port 0C4h
Not supported.
I/O Port 0C6h
Not supported.
I/O Port 0C8h
Not supported.
I/O Port 0CAh
Not supported.
I/O Port 0CCh
Not supported.
I/O Port 0CEh
Not supported.
Bit
7:6
3:2
1:0
5
4
Description
Transfer Mode.
00: Demand.
01: Single.
10: Block.
11: Cascade.
Address Direction.
0: Increment.
1: Decrement.
Auto-initialize.
0: Disable.
1: Enable.
Transfer Type.
00: Verify.
01: Write transfer (I/O to memory).
10: Read transfer (memory to I/O).
11: Reserved.
Channel Number Mode Select.
00: Channel 0.
01: Channel 1.
10: Channel 2.
11: Channel 3.
Table 6-43. DMA Channel Control Registers (Continued)
DMA Clear Mask Register Command, Channels 3:0 (W)
DMA Write Mask Register Command, Channels 3:0 (W)
DMA Clear Byte Pointer Command, Channels 3:0 (W)
DMA Channel Mode Register, Channels 3:0 (WO)
DMA Master Clear Command, Channels 3:0 (W)
DMA Channel 4 Transfer Count Register (R/W)
DMA Channel 5 Transfer Count Register (R/W)
DMA Channel 6 Transfer Count Register (R/W)
DMA Channel 7 Transfer Count Register (R/W)
DMA Channel 4 Address Register (R/W)
DMA Channel 5 Address Register (R/W)
DMA Channel 6 Address Register (R/W)
DMA Channel 7 Address Register (R/W)
32580B
307
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