LTC4245CUHFTR Linear Technology, LTC4245CUHFTR Datasheet - Page 15

• Manufacturer Part Number: LTC4245CUHFTR
• Manufacturer: Linear Technology

Specifications of LTC4245CUHFTR

• Family Name: LTC4245
• Package Type: QFN EP
• Operating Supply Voltage (min): 2.25/4.25/10.2/-10.2V
• Operating Supply Voltage (max): 0/10/20/-20V
• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Product Depth (mm): 5mm
• Product Length (mm): 7mm
• Mounting: Surface Mount
• Pin Count: 38
• Lead Free Status / Rohs Status: Not Compliant

APPLICATIO S I FOR ATIO
The typical LTC4245 application is in a high availability sys-
tem where boards using multiple supplies are hot plugged.
The device enables the system to periodically monitor board
power consumption and fault status over the I
Boards in CompactPCI and PCI Express systems typically
utilize three to four supplies. Figure 1 shows the LTC4245
being used in a CompactPCI application.
The following sections describe the turn on, turn off and
fault response behavior of the LTC4245. The ADC and I
interface are discussed next. External component selection
is discussed in detail in the Design Example section.
CPCI Connection Pin Sequence
The staggered lengths of the CPCI male connector pins on
the backplane ensures that all power supplies are physi-
cally connected to the LTC4245 before back-end power
is allowed to ramp up (BD_SEL# asserted low). The long
pins, which include 5V, 3.3V, V(I/O) and GND, mate fi rst.
The short BD_SEL# pin mates last. At least one long 3.3V
power pin must be connected to the LTC4245 in order for
the PRECHARGE pin voltage to be available before the
CPCI bus pins mate.
The following is a typical hot plug sequence.
1. ESD clips make contact.
2. Long power and ground pins make contact and Early
3. Medium length pins make contact. The 12V and –12V
4. Short pins make contact. If the BD_SEL# signal is
Power is established. The 1V precharge voltage
becomes valid at this stage. Power is also applied
to the pull-up resistors connected to the HEALTHY#
and BD_SEL# signals. LOCAL_PCI_RST# is held
in reset. All power switches are held off at this stage
of insertion.
connector pins make contact at this stage. The
internal low voltage supply of the LTC4245 (INTV
powers up from the 12V supply. An internal 10μA
pull-up from INTV
connector pins that mate are HEALTHY#, PCI_RST#
and the bus I/O pins (which are precharged to 1V).
grounded on the backplane, the plug-in board
power-up cycle may begin immediately. If the ON pin
U
CC
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to BD_SEL# turns on. Other
W
2
C interface.
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CC
2
C
)
Turn-On
The back-end power planes are isolated from the input
power planes by external N-channel pass transistors Q1
through Q4. Sense resistors R1 to R4 provide current
fault detection. Resistors R5 to R8 prevent high frequency
oscillations in MOSFETs Q1 to Q4 respectively.
The following conditions must be satisfi ed for a duration of
100ms before the external switches can be turned on.
When these initial conditions are satisfi ed, the ON pin is
checked. If it is high, the four FET On control bits (D0 to
D3) are set either simultaneously (the default state) or
in a 12V, 5V, 3.3V, –12V sequence (register bit C6 set).
If ON is low, the external switches turn on when the ON
pin is brought high or if a serial bus turn-on command
is received. Figure 2 shows all supplies turning on after
BD_SEL# goes low.
1. All input supplies and the internally generated supply,
2. No undervoltage, overcurrent or PGI fault bits must
3. The BD_SEL# pin must be pulled low.
is tied high then turn-on is automatic, else the LTC4245
waits for a serial bus turn-on command. System
backplanes that do not ground the BD_SEL# signal
will instead have circuitry that detects when
BD_SEL# makes contact with the plug-in board. The
system logic can then control the power up process
by pulling BD_SEL# low. The precharge potential may
be optionally disconnected from the CPCI bus signals
at this stage.
INTV
thresholds. The V
disabled by not tying the CFG pin low.
be set unless the corresponding auto-retry is enabled.
When 12V
rises above its undervoltage threshold which
generates a 60μs to 120μs internal power-on-reset
pulse. During reset, the fault registers are cleared
and the control bits are initialized. If INTV
up, then the I
fault bits or set the auto-retry bits.
CC
, must exceed their undervoltage lockout
IN
powers up for the fi rst time, INTV
2
C interface can be used to clear the
EE
undervoltage lockout can be
LTC4245
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is already
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