MAX5556ESA+T Maxim Integrated Products, MAX5556ESA+T Datasheet - Page 7

• Manufacturer Part Number: MAX5556ESA+T
• Description: IC DAC STEREO AUDIO 8-SOIC
• Manufacturer: Maxim Integrated Products

Specifications of MAX5556ESA+T

• Number Of Bits: 16
• Data Interface: Serial
• Number Of Converters: 2
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (3.9mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Power Dissipation (max): -
• Settling Time: -

The MAX5556 stereo audio sigma-delta DAC offers a
complete stereo digital-to-analog system for consumer
audio applications. The MAX5556 features built-in digital
interpolation/filtering, sigma-delta digital-to-analog con-
version and analog output filters (Figure 2). Control logic
and mute circuitry minimize audible pops and clicks dur-
ing power-up, power-down, and whenever invalid clock
conditions occur.
This stereo audio DAC receives input data over a 3-wire
I
justified I
ports a wide range of sample rates from 2kHz to 50kHz.
Direct analog output data is routed to the right or left
output by driving LRCLK high or low. See the Clock and
Data Interface section.
The MAX5556 supports MCLK/LRCLK ratios of 256,
384, or 512. This device allows a change to the clock
speed ratio without causing glitches on the analog out-
puts by internally muting the audio during invalid clock
conditions. The internal mute function ramps down the
audio amplitude and forces the analog outputs to a
2.4V quiescent voltage immediately upon clock loss or
2
S-compatible interface. The MAX5556 accepts left-
PIN
1
2
3
4
5
6
7
8
2
S data of 16 or 24 bits. This DAC also sup-
SDATA
LRCLK
NAME
MCLK
OUTR
OUTL
SCLK
GND
V
_______________________________________________________________________________________
DD
Detailed Description
Serial Audio Data Input. Data is clocked into the MAX5556 on the rising edge of the internal or
external SCLK. Data is input in two’s complement format, MSB first. The state of LRCLK determines
whether data is directed to OUTL or OUTR.
External Serial-Clock Input. Data is strobed on the rising edge of SCLK.
Left-/Right-Channel Select Clock. Drive LRCLK low to direct data to OUTL or LRCLK high to direct
data to OUTR.
Master Clock Input. The MCLK/LRCLK ratio must equal to 256, 384, or 512.
Right-Channel Analog Output
Ground
Power-Supply Input. Bypass V
close to V
Left-Channel Analog Output
DD
as possible. Place the 0.1µF capacitor closest to V
Low-Cost Stereo Audio DAC
DD
to GND with a 0.1µF capacitor in parallel with a 4.7µF capacitor as
change of ratio. A soft-start routine is then engaged
when a valid clock ratio is re-established, producing
clickless and popless continuous operation.
The MAX5556 operates from a +4.75V to +5.5V analog
supply and features +87dB dynamic range with total
harmonic distortion typically below -87dB.
The digital interpolation filter eliminates images of the
baseband audio signal that exist at multiples of the input
sample rate (f
spectrum has images of the input signal at multiples of 8
x f
upsampling images up to 64 x f
mately removed through the internal analog lowpass filter
and the external analog output filter.
The MAX5556 uses a multibit sigma-delta DAC with an
oversampling ratio (OSR) of 64 to achieve a wide dynam-
ic range. The sigma-delta modulator accepts a 3-bit data
stream from the interpolation filter at a rate of 64 x f
LRCLK frequency) and provides an analog voltage rep-
resentation of that data stream.
S
. An additional upsampling sinc filter further reduces
FUNCTION
S
). The resulting upsampled frequency
Sigma-Delta Modulator/DAC
DD.
Pin Description
S
. These images are ulti-
Interpolator
S
(f
S
7
=