ICS83905AG IDT, Integrated Device Technology Inc, ICS83905AG Datasheet - Page 14

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ICS83905AG

Manufacturer Part Number
ICS83905AG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet

Specifications of ICS83905AG

Lead Free Status / Rohs Status
Not Compliant

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ICS83905 Data Sheet
Layout Guideline
Figure 5 shows an example of ICS83905 applications schematic. In
this example, the device is operated at V
The decoupling capacitors should be loacted as close as possible to
the power pins. The input is driven by an 18pF load resonant quartz
crystal. The tuning capacitors (C1, C2) are fairly accurate, but minor
Figure 5. Schmatic of Recommended Layout
ICS83905AM REVISION B JULY 20, 2009
VDDO
C2
15pf
ENABLE 2
1
2
3
4
5
6
7
8
U1
ICS83905I
VDD
XTAL_OUT
ENABLE 2
GND
BCLK0
VDDO
BCLK1
GND
BCLK2
C3
10uF
CL = 18 pf
C4
.1uF
ENABLE 1
XTAL_IN
BCLK5
BCLK4
BCLK3
VDDO
GND
DD
VDD
VDDO
C5
.1uF
= 3.3V and V
16
15
14
13
12
11
10
9
C6
.1uF
ENABLE 1
DDO
C1
15pF
VDDO = 3.3V
= 3.3V.
VDD = 3.3V
14
adjustments might be required. For the LVCMOS output drivers, two
termination examples are shown in the schematic. For additonal
termination, examples are shown in the LVCMOS Termination
Applications Note.
Unused outputs can be left floating. There should be
no trace attached to unused outputs. Device
characterized and specification limits set with all
outputs terminated.
R2
31
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
Optional Termination
Zo = 50 Ohm
Zo = 50 Ohm
VDD
©2009 Integrated Device Technology, Inc.
R3
100
R4
100
LVCMOS
LVCMOS

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