ICS83905AG IDT, Integrated Device Technology Inc, ICS83905AG Datasheet - Page 18
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ICS83905AG
Manufacturer Part Number
ICS83905AG
Description
Manufacturer
IDT, Integrated Device Technology Inc
Datasheet
1.ICS83905AG.pdf
(21 pages)
Specifications of ICS83905AG
Lead Free Status / Rohs Status
Not Compliant
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ICS83905 Data Sheet
Package Outline and Package Dimensions
Package Outline - K Suffix for 32 Lead VFQFN
NOTE: The following package mechanical drawing is a generic
drawing that applies to any pin count VFQFN package. This drawing
is not intended to convey the actual pin count or pin layout of this
Table 9C. Package Dimensions
Reference Document: JEDEC Publication 95, MO-220
ICS83905AM REVISION B JULY 20, 2009
N
D2 & E2
Symbol
D & E
D
A1
A3
N
A
b
& N
L
e
Ind ex Area
E
All Dimensions in Millimeters
JEDEC Variation: VGGD-1/-5
0.6 x 0.6 max
OPTIONAL
Chamfer 4x
Minimum
0.80
0.18
1.95
0.35
N
0
To p View
D
4.00 Basic
0.50 Basic
Nominal
0.25 Ref.
20
5
S eating Plan e
Singula tion
Maximum
Anvil
OR
1.00
0.05
0.30
2.25
0.75
0. 08
A1
C
A
A 3
E 2
C
E2
N & N
(Ref.)
Odd
L
2
18
e
device. The pin count and pinout are shown on the front page. The
package dimensions are in Table 9C below.
(N
-1)x e
(R ef.)
D2
D2
2
N
LOW SKEW, 1:6 CRYSTAL-TO-LVCMOS/LVTTL FANOUT BUFFER
1
2
N & N
Even
(Ref.)
e
Th er mal
2
Ba se
If N & N
are Even
(N -1)x e
b
(Ty p.)
(Re f.)
©2009 Integrated Device Technology, Inc.