R8A66173SP#DF0Z Renesas Electronics America, R8A66173SP#DF0Z Datasheet
R8A66173SP#DF0Z
Specifications of R8A66173SP#DF0Z
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R8A66173SP#DF0Z Summary of contents
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To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...
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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...
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R8A66173SP 4-CH 12-BIT PWM GENERATOR DESCRIPTION R8A66173 has four 12-bit PWM (Pulse Width Modulation) circuits which are built by using the CMOS process. This IC controls PWM waveform by adjusting the “H” width according to serial data sent from MCU ...
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R8A66173SP BLOCK DIAGRAM (EACH CHANNEL) Upper byte Input register S 5 CLK Low er byte Control 3 circuit FUNCTION The PWM output waveform of each channel is controlled by taking ...
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R8A66173SP PIN DESCRIPTIONS Pin Name Input/Output Reset input R CS Chip select input WR Write control input Serial data input CLK Write clock input OC Output control input PWM1∼ PWM outputs 1∼4 PWM4 X Clock input IN ...
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R8A66173SP Table 2 Patterns of Lower 4-bits and Subsections whose "H" Width is increased PWM register Subsection tm whose H width is increased by τ 0∼15) b3∼b0 0000 Nothing 0001 0010 ...
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R8A66173SP PWM Waveform Output (1)12-bit PWM output One PWM waveform cycle is divided into 16(= minimum resolution bits τ(=2/f into 256(=2 determined by the upper 8-bits of PWM data. (In Fig.2 above, ”H” width is 4A Among these ...
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R8A66173SP CLK PWM output PWM Setting Data 000 16 001 16 τ 002 16 τ 003 16 τ 00E 16 00F 16 τ 010 16 τ 011 16 τ 012 16 τ 013 16 τ τ×150 ...
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R8A66173SP PWM Setting Data 000 16 τ τ 010 16 τ×2 τ×2 020 16 τ×254 τ×254 FE0 16 τ×255 τ×255 FF0 16 t0 Fig.5 8-bit PWM Waveform Output Example DATA S IN internal signal "Φ" (cycle ...
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R8A66173SP Set upper byte REJ03F0264-0100 Rev.1.00 Jan.24.2008 Page Start Reset Set low er byte 1 b0 Setting complete? YES Output enable PWM output Change YES Repeat A setting? NO Stop Fig.7 PWM Setting Flow Chart ...
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R8A66173SP ABSOLUTE MAXIMUM RATINGS Symbol Parameter Vcc Supply voltage V Input voltage I V Output voltage O I Output current O Icc Supply/GND current Pd Power dissipation Tstg Storage temperature RECOMMENDED OPERATING CONDITIONS Symbol Parameter Vcc Supply voltage GND Supply ...
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R8A66173SP SWITCHING CHARACTERISTICS Symbol Parameter Maximum clock fmax X IN frequency t PLH Output "L-H", "H-L" X -PWM1~4 IN propagation time t PHL TIMING REQUIREMENTS Symbol Parameter t X cycle time c( “H” pulse width w(XH) IN ...
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R8A66173SP TIMING CHARTS tsu(CS) th(CS) 50% 50 50% tsu(WR) S CLK 50 (XH) 50 Φ (internal clock) PWM1~4 Note 2. (1)Shaded portions indicate that switching is possible during those periods. (2)PWM outputs 1 ...
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R8A66173SP PACKAGE OUTLINE Package 14pin SOP All trademarks and registered trademarks are the property of their respective owners. REJ03F0264-0100 Rev.1.00 Jan.24.2008 Page RENESAS Code Previous Code PRSP0014DG-A 14P2X-B ...
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