EVAL-ADT7310EBZ Analog Devices Inc, EVAL-ADT7310EBZ Datasheet - Page 20

• Manufacturer Part Number: EVAL-ADT7310EBZ
• Manufacturer: Analog Devices Inc

Specifications of EVAL-ADT7310EBZ

• Lead Free Status / Rohs Status: Supplier Unconfirmed

ADT7310
READING DATA
A read transaction begins when the master writes the command
byte to the ADT7310 with the read/write bit set to 1. The master
then supplies 8 or 16 clock pulses, depending on the addressed
register, and the ADT7310 clocks out data from the addressed
register on the DOUT line. Data is clocked out on the first
falling edge of SCLK following the command byte.
The read transaction finishes when the master takes CS high.
The master must begin a new read transaction on the bus for
every register read. Only one register is read per bus transaction.
However, in continuous read mode, Command Byte C2 = 1, and
the temperature value register can be read from continuously.
The master sends 16 clock pulses on SCLK, and the temperature
value is clocked out on DOUT.
INTERFACING TO DSPs OR MICROCONTROLLERS
The ADT7310 can be operated with CS used as a frame syn-
chronization signal. This scheme is useful for DSP interfaces.
In this case, the first bit (MSB) is effectively clocked out by CS
because CS normally occurs after the falling edge of SCLK in
SCLK
DOUT
DIN
CS
C7
0
1
R/W
C6
2
8-BIT COMMAND BYTE
REGISTER ADDR
C5
3
C4
4
C3
5
CONT
READ
C2
6
C1
0
7
C0
Figure 21. Read from a 16-Bit Register
0
8
D15
9
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D14
10
D13
11
D12
DSPs. SCLK can continue to run between data transfers,
provided that the timing numbers are obeyed.
CS can be tied to ground, and the serial interface can be
operated in a 3-wire mode. DIN, DOUT, and SCLK are
used to communicate with the ADT7310 in this mode.
For microcontroller interfaces, it is recommended that SCLK
idle high between data transfers.
SERIAL INTERFACE RESET
The serial interface can be reset by writing a series of 1s on the
DIN input. If a Logic 1 is written to the ADT7310 line for at
least 32 serial clock cycles, the serial interface is reset. This
ensures that the interface can be reset to a known state if the
interface gets lost due to a software error or some glitch in the
system. Reset returns the interface to the state in which it is
expecting a write to the communications register. This opera-
tion resets the contents of all registers to their power-on values.
Following a reset, the user should allow a period of 500 μs
before addressing the serial interface.
12
D11
13
D10
14
16-BIT DATA
D9
15
D8
16
D7
17
D2
22
D1
23
D0
24