M25PX16-VMW6G Micron Technology Inc, M25PX16-VMW6G Datasheet - Page 24

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M25PX16-VMW6G

Manufacturer Part Number
M25PX16-VMW6G
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of M25PX16-VMW6G

Cell Type
NOR
Density
16Mb
Access Time (max)
8ns
Interface Type
Serial (SPI)
Boot Type
Not Required
Address Bus
1b
Operating Supply Voltage (typ)
2.5/3.3V
Operating Temp Range
-40C to 85C
Package Type
SO W
Sync/async
Synchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.3V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
2M
Supply Current
12mA
Mounting
Surface Mount
Pin Count
8
Lead Free Status / Rohs Status
Compliant

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6.2
6.3
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Write Disable (WRDI)
The Write Disable (WRDI) instruction
The Write Disable (WRDI) instruction is entered by driving Chip Select (S) Low, sending the
instruction code, and then driving Chip Select (S) High.
The Write Enable Latch (WEL) bit is reset under the following conditions:
Figure 9.
Read Identification (RDID)
The Read Identification (RDID) instruction allows to read the device identification data:
The manufacturer identification is assigned by JEDEC, and has the value 20h. The device
identification is assigned by the device manufacturer, and indicates the memory type in the
first byte (71h), and the memory capacity of the device in the second byte (15h). The UID
contains the length of the following data in the first byte (set to 10h) and 16 bytes of the
optional Customized Factory Data (CFD) content. The CFD bytes are read-only and can be
programmed with customers data upon their demand. If the customers do not make
requests, the devices are shipped with all the CFD bytes programmed to zero (00h).
Power-up
Write Disable (WRDI) instruction completion
Write Status Register (WRSR) instruction completion
Write lo Lock Register (WRLR) instruction completion
Page Program (PP) instruction completion
Dual Input Fast Program (DIFP) instruction completion
Program OTP (POTP) instruction completion
Subsector Erase (SSE) instruction completion
Sector Erase (SE) instruction completion
Bulk Erase (BE) instruction completion
Manufacturer identification (1 byte)
Device identification (2 bytes)
A Unique ID code (UID) (17 bytes, of which 16 available upon customer request).
Write Disable (WRDI) instruction sequence
S
C
DQ0
DQ1
High Impedance
0
(Figure
1
2
Instruction
9) resets the Write Enable Latch (WEL) bit.
3
4
5
6
7
AI13732

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