MAX5741EUB+T Maxim Integrated Products, MAX5741EUB+T Datasheet - Page 10

IC DAC 10BIT QUAD LP SER 10-UMAX

MAX5741EUB+T

Manufacturer Part Number
MAX5741EUB+T
Description
IC DAC 10BIT QUAD LP SER 10-UMAX
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX5741EUB+T

Settling Time
4µs
Number Of Bits
10
Data Interface
Serial
Number Of Converters
4
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-MSOP, Micro10™, 10-uMAX, 10-uSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Power Dissipation (max)
-
10-Bit, Low-Power, Quad, Voltage-Output
DAC with Serial Interface
Table 1. Power-Down Mode Control
tents to the DAC latch. CS may then either be held low
or brought high. CS must be brought high for a mini-
mum of 80ns before the next write sequence, since a
write sequence is initiated on a falling edge of CS. Not
keeping CS low during the first 15 SCLK cycles dis-
cards input data. The serial clock (SCLK) can idle
either high or low between transitions.
The MAX5741 has two internal registers per DAC, the
input register and the DAC register. The input register
holds the data that is waiting to be shifted to the DAC
register. All four input registers can be loaded without
updating the output. This function is useful when all out-
puts need to be updated at the same time. The input
register can be made transparent. When the input reg-
ister is transparent, the data written into DIN loads
directly to the DAC register and the output is updated.
10
X = Don’t Care
C3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
EXTENDED
______________________________________________________________________________________
CONTROL
C2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
C1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
C0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
D9–D3
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
D2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
DATA BITS
D1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
D0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
S1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
S0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
The DAC output is not updated until data is written to
the DAC register. See Table 2 for a list of serial-inter-
face programming commands.
The MAX5741 has an internal POR circuit. At power-up all
DACs are powered-down and OUT_ is terminated to
GND through 100kΩ resistors. Contents of input and DAC
registers are cleared to all zero. 8µs recovery time after
issuing a wake-up command is needed before writing to
the DAC registers. Power-down mode control commands
can be applied immediately with no recovery time.
C3–C0 are control bits. The data bits D9 to D0 are in
straight binary format. Set bits S1 and S0 to zero. All
zeros correspond to zero scale and all ones corre-
spond to full scale.
DESCRIPTION
DAC A-D
DAC A-D
DAC A-D
DAC A-D
DAC C
DAC C
DAC C
DAC C
DAC D
DAC D
DAC D
DAC D
DAC A
DAC A
DAC A
DAC A
DAC B
DAC B
DAC B
DAC B
DAC O/P, wake-up
Floating output
Output is terminated with 1kΩ
Output is terminated with 100kΩ
DAC O/P, wake-up
Floating output
Output is terminated with 1kΩ
Output is terminated with 100kΩ
DAC O/P, wake-up
Floating output
Output is terminated with 1kΩ
Output is terminated with 100kΩ
DAC O/P, wake-up
Floating output
Output is terminated with 1kΩ
Output is terminated with 100kΩ
DAC O/P, wake-up
Floating output
Output is terminated with 1kΩ
Output is terminated with 100kΩ
Power-On Reset (POR)
FUNCTION

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