LFEC15E-5FN484C Lattice, LFEC15E-5FN484C Datasheet - Page 62

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LFEC15E-5FN484C

Manufacturer Part Number
LFEC15E-5FN484C
Description
FPGA LatticeEC Family 15400 Cells 420MHz 130nm (CMOS) Technology 1.2V 484-Pin FBGA
Manufacturer
Lattice
Datasheet

Specifications of LFEC15E-5FN484C

Package
484FBGA
Family Name
LatticeEC
Device Logic Units
15400
Maximum Internal Frequency
420 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
352
Ram Bits
358400
In System Programmability
Yes
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Lattice Semiconductor
Figure 3-12. sysCONFIG Parallel Port Read Cycle
Figure 3-13. sysCONFIG Parallel Port Write Cycle
WRITEN
WRITEN
1. In Master Parallel Mode the FPGA provides CCLK. In Slave Parallel Mode the external device provides CCLK.
1. In Master Parallel Mode the FPGA provides CCLK. In Slave Parallel Mode the external device provides CCLK.
CCLK
CS1N
BUSY
D[0:7]
CCLK
CS1N
BUSY
D[0:7]
CSN
CSN
1
1
t
SUCBDI
t
t
t
t
SUWD
SUCS
SUWD
SUCS
Byte 0
Byte 0
t
t
BSCL
BSCL
3-26
Byte 1
Byte 1
t
t
CORD
HCBDI
Byte 2
t
t
DCB
DCB
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
t
Byte 2
t
BSCYC
t
BSCYC
t
BSCH
BSCH
Byte n
Byte n
t
HCS
t
t
t
HCS
HWD
HWD

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