LFEC3E-3F256I Lattice, LFEC3E-3F256I Datasheet - Page 32
![no-image](/images/manufacturer_photos/0/3/380/lattice_sml.jpg)
LFEC3E-3F256I
Manufacturer Part Number
LFEC3E-3F256I
Description
FPGA LatticeEC Family 3100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
Manufacturer
Lattice
Datasheet
1.LFEC3E-5TN144C.pdf
(163 pages)
Specifications of LFEC3E-3F256I
Package
256FBGA
Family Name
LatticeEC
Device Logic Units
3100
Maximum Internal Frequency
340 MHz
Typical Operating Supply Voltage
1.2 V
Maximum Number Of User I/os
160
Ram Bits
56320
In System Programmability
Yes
Lead Free Status / Rohs Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFEC3E-3F256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
- Current page: 32 of 163
- Download datasheet (962Kb)
Lattice Semiconductor
Figure 2-34. LatticeECP/EC Banks
LatticeECP/EC devices contain two types of sysI/O buffer pairs.
1. Top and Bottom sysI/O Buffer Pairs (Single-Ended Outputs Only)
2. Left and Right sysI/O Buffer Pairs (Differential and Single-Ended Outputs)
The sysI/O buffer pairs in the top and bottom banks of the device consist of two single-ended output drivers
and two sets of single-ended input buffers (both ratioed and referenced). The referenced input buffer can also
be configured as a differential input.
The two pads in the pair are described as “true” and “comp”, where the true pad is associated with the positive
side of the differential input buffer and the comp (complementary) pad is associated with the negative side of
the differential input buffer.
Only the I/Os on the top and bottom banks have programmable PCI clamps. These I/O banks also support hot
socketing with IDK less than 1mA. Note that the PCI clamp is enabled after V
operating levels and the device has been configured.
The sysI/O buffer pairs in the left and right banks of the device consist of two single-ended output drivers, two
sets of single-ended input buffers (both ratioed and referenced) and one differential output driver. The refer-
enced input buffer can also be configured as a differential input. In these banks the two pads in the pair are
described as “true” and “comp”, where the true pad is associated with the positive side of the differential I/O,
and the comp (complementary) pad is associated with the negative side of the differential I/O.
Only the left and right banks have LVDS differential output drivers. See the I
rent during power-up.
V
V
V
V
V
V
GND
GND
REF1(7)
REF2(7)
CCIO7
CCIO6
REF2(6)
REF1(6)
Bank 0
Bank 5
BOTTOM
2-29
TOP
Bank 1
Bank 4
LatticeECP/EC Family Data Sheet
DK
CC
specification for I/O leakage cur-
, V
V
V
V
V
V
V
GND
GND
CCAUX
REF1(2)
REF2(2)
REF2(3)
REF1(3)
CCIO2
CCIO3
and V
CCIO
Architecture
are at valid
Related parts for LFEC3E-3F256I
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![LFEC3E-3T144I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 97 IO 1.2V -3 Spd I
Manufacturer:
Lattice
![LFEC3E-3T100I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 67 IO 1.2V -3 Spd I
Manufacturer:
Lattice
![LFEC3E-3Q208I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs 145 IO 1.2 V -3 Spd I
Manufacturer:
Lattice
![LFEC3E-3FN256C](/images/manufacturer_photos/0/3/381/lattice_semiconductor_tmb.jpg)
Part Number:
Description:
FPGA LatticeEC Family 3100 Cells 340MHz 130nm (CMOS) Technology 1.2V 256-Pin FBGA
Manufacturer:
LATTICE SEMICONDUCTOR
Datasheet:
![LFEC3E-5TN144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs Pb-Free
Manufacturer:
Lattice
Datasheet:
![LFEC3E-3QN208C](/photos/16/15/161504/qfp208_tmb.jpg)
Part Number:
Description:
FPGA - Field Programmable Gate Array 3.1K LUTs
Manufacturer:
Lattice
Datasheet:
![LFEC3E-3TN100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-3TN144I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 97I/O 144-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-4TN144C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 97I/O 144-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-3F256C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 160I/O 256-BGA
Manufacturer:
Lattice
Datasheet:
![LFEC3E-5TN100C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 67I/O 100-TQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-4QN208C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 145I/O 208-PQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-3QN208I](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3KLUTS 208PQFP
Manufacturer:
Lattice
Datasheet:
![LFEC3E-4F256C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 160I/O 256-BGA
Manufacturer:
Lattice
Datasheet:
![LFEC3E-4FN256C](/images/manufacturer_photos/0/3/380/lattice_tmb.jpg)
Part Number:
Description:
IC FPGA 3.1KLUTS 160I/O 256-BGA
Manufacturer:
Lattice
Datasheet: