TWR-S12G128-KIT Freescale Semiconductor, TWR-S12G128-KIT Datasheet - Page 6

• Manufacturer Part Number: TWR-S12G128-KIT
• Description: TOWER KIT S12G128
• Manufacturer: Freescale Semiconductor

T W R - 9 S 1 2 G 1 2 8
U S E R
MEMORY MAP
Figure 1 below shows the target device memory map. Refer to the MC9S12G128 Reference
Manual (RM) for further information.
Figure 1: Memory Map
G U I D E
0x0000–0x0009
0x000A–0x000B
0x000C–0x000D
0x000E–0x000F
0x0010–0x0017
0x0018–0x0019
0x001A–0x001B
0x001C–0x001F
0x0020–0x002F
0x0030–0x0033
0x0034–0x003F
0x0040–0x006F
0x0070–0x009F
0x00A0–0x00C7
0x00C8–0x00CF
0x00D0–0x00D7
0x00D8–0x00DF
0x00E0–0x00E7
0x00E8–0x00EF
0x00F0–0x00F7F
0x00F8–0x00FF
0x0100–0x0113
0x0114–0x011F
0x0120
0x0121–0x013F
0x0140–0x017F
0x0180–0x023F
0x0240–0x027F
0x0280–0x02EF
0x02F0–0x02FF
0x0300–0x03BF
0x03C0–0x03C7
0x03C8–0x03CF
0x03D0–0x03FF
Address
PIM (port integration module)
MMC (memory map control)
PIM (port integration module)
Reserved
MMC (memory map control)
Reserved
Device ID register
PIM (port integration module)
DBG (debug module)
Reserved
CPMU (clock and power management)
TIM0 (timer module)
ATD (analog-to-digital converter, 10 bit, 8-channel)
PWM (pulse-width modulator)
SCI0 (serial communications interface)
Reserved
SCI2 (serial communications interface)
SPI1 (serial peripheral interface)
SPI1 (serial peripheral interface)
FTMRC control registers
Reserved
INT (interrupt module)
Reserved
CAN
Reserved
PIM (port integration module)
Reserved
CPMU (clock and power management)
Reserved
DAC0 (digital to analog converter)
DAC1 (digital to analog converter)
Reserved
6
Module
(Bytes)
Size
J U N E
192
112
192
10
16
12
48
48
40
20
12
31
64
64
16
48
2
2
2
8
2
2
4
4
8
8
8
8
8
8
8
1
8
8
2 ,
2 0 1 0