MT46H8M32LFB5-6IT:H Micron Technology Inc, MT46H8M32LFB5-6IT:H Datasheet - Page 84
MT46H8M32LFB5-6IT:H
Manufacturer Part Number
MT46H8M32LFB5-6IT:H
Description
MICMT46H8M32LFB5-6_IT:H MDDDR
Manufacturer
Micron Technology Inc
Datasheet
1.MT46H8M32LFB5-6ITH.pdf
(96 pages)
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Figure 45: Bank Read – Without Auto Precharge
PDF: 09005aef834bf85b
256mb_mobile_ddr_sdram_t36n.pdf - Rev. I 09/10 EN
Case 2:
Case 1:
Command
BA0, BA1
Address
DQ
DQ
DQS
DQS
t
t
AC (MAX) and
CK#
CKE
A10
DM
AC (MIN) and
CK
7,8
7,8
7
7
t
t
IS
IS
NOP
T0
t
t
DQSCK (MIN)
DQSCK (MAX)
t
t
1
IH
IH
Notes:
t
ACTIVE
Bank x
IS
t
IS
Row
Row
T1
t
IH
t
IH
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 in the case shown.
3. PRE = PRECHARGE.
4. Disable auto precharge.
5. Bank x at T5 is “Don’t Care” if A10 is HIGH at T5.
6. The PRECHARGE command can only be applied at T5 if
7. Refer to Figure 29 (page 66) and Figure 30 (page 67) for DQS and DQ timing details.
8. D
t
CK
t
t
t
RCD
RAS
RC
these times.
OUT
NOP
6
T2
n = data out from column n.
1
t
CH
t
CL
Bank x
READ
t
Note 4
t
Col n
IS
LZ (MIN)
T3
t
2
IH
CL = 2
t
RPRE
t
t
AC (MIN)
LZ (MIN)
NOP
T4
84
1
t
AC (MAX)
D
t
256Mb: x16, x32 Mobile LPDDR SDRAM
OUT
RPRE
n
t
One bank
DQSCK (MIN)
All banks
Bank x
D
n + 1
PRE
Micron Technology, Inc. reserves the right to change products or specifications without notice.
OUT
T5
D
t
OUT
DQSCK (MAX)
n
3
5
D
n + 2
T5n
OUT
D
n + 1
OUT
D
n + 3
NOP
t
OUT
T6
RPST
D
n + 2
OUT
Don’t Care
1
t
RP
T6n
t
HZ (MAX)
t
D
n + 3
RPST
OUT
t
RAS (MIN) is met.
NOP
T7
© 2008 Micron Technology, Inc. All rights reserved.
1
Transitioning Data
Auto Precharge
ACTIVE
Bank x
Row
Row
T8
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