ATF1508RE-7AU100 Atmel, ATF1508RE-7AU100 Datasheet - Page 9

• Manufacturer Part Number: ATF1508RE-7AU100
• Description: IC CPLD EE 128MC 5NS 100-TQFP
• Manufacturer: Atmel
• Series: ATF1508REr

Specifications of ATF1508RE-7AU100

• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 7.5ns
• Voltage Supply - Internal: 3 V ~ 3.6 V
• Number Of Macrocells: 128
• Number Of I /o: 80
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 100-TQFP, 100-VQFP
• Features: Programmable
• Voltage: 1.8V, 2.5V, 3.3V
• Memory Type: EEPROM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -

2.2
2.3
2.4
2.5
3682A–PLD–10/08
Schmitt Trigger
Output Drive Capability
I/O Bank
I/O Standard
Figure 2-2.
The Input Buffer of each input and I/O pin has an optional schmitt trigger setting. The schmitt
trigger option can be used to buffer inputs with slow rise times.
Each output has a high/low drive option. The low drive option (slow slew rate) can be used to
reduce system noise by slowing down outputs that do not need to operate at maximum speed or
drive strength. Outputs default to high drive strength by Atmel software and can be set to low
drive strength through the slew rate option.
The I/O pins of the ATF1508RE are grouped into two banks, Bank A and Bank B. Bank A com-
prises of I/O pins for macrocells 1 to 64 (Logic Block A, B, C, and D), and it is powered by
V
it is powered by V
The ATF1508RE supports a wide range of I/O standards which include LVTTL, LVCMOS33,
LVCMOS25, LVCMOS18 and LVCMOS15. The I/O pins of the ATF1508RE can also be individ-
ually configured to support SSTL-2 (Class I) and SSTL-3 (Class I) advanced I/O standards.
This and the two I/O banks, together, allow the ATF1508RE to be used for voltage level
translation.
CCIOA
. Bank B comprises of I/O pins for macrocells 65 to 128 (Logic Block E, F, G, and H), and
I/O with Programmable Pin-keeper
CCIOB
.
V
CCIO
V
CCINT
50K
ATF1508RE
9