ATF1502BE-5AX44 Atmel, ATF1502BE-5AX44 Datasheet - Page 17

• Manufacturer Part Number: ATF1502BE-5AX44
• Description: IC CPLD 64MC 1.8V 44-TQFP
• Manufacturer: Atmel
• Series: ATF1502BEr

Specifications of ATF1502BE-5AX44

• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 7.0ns
• Voltage Supply - Internal: 1.7 V ~ 1.9 V
• Number Of Macrocells: 32
• Number Of I /o: 32
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-TQFP, 44-VQFP
• Features: CMOS/TTL Compatible
• Voltage: 1.8V
• Memory Type: EEPROM
• For Use With: ATF15XX-DK3 - KIT DEV FOR ATF15XX CPLD'S
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Logic Elements/cells: -

12. Power-down Mode
3492A–PLD–12/05
The ATF1502BE includes an optional pin-controlled power-down feature. When this mode is
enabled, the PD pin acts as the power-down pin. When the PD pin is high, the device supply cur-
rent is reduced to less than 100 µA. During power-down, all output data and internal logic states
are latched and held. Therefore, all registered and combinatorial output data remain valid. Any
outputs that were in a high-Z state at the onset will remain at high-Z. During power-down, all
input signals except the power-down pin are blocked. Input and I/O hold latches remain active to
ensure that pins do not float to indeterminate levels, further reducing system power. The power-
down pin feature is enabled in the logic design file or through Atmel software. Designs using the
power-down pin may not use the PD pin logic array input. However, all other PD pin macrocell
resources may still be used, including the buried feedback and foldback product term array
inputs.
Table 12-1.
Notes:
Symbol
t
t
t
t
t
t
t
t
t
t
IVDH
GVDH
CVDH
DHIX
DHGX
DHCX
DLIV
DLGV
DLCV
DLOV
1. For low-drive outputs, add t
2. Pin or product term.
Parameter
Valid I, I/O before PD High
Valid OE
Valid Clock
I, I/O Don’t Care after PD High
OE
Clock
PD Low to Valid I, I/O
PD Low to Valid OE (Pin or Term)
PD Low to Valid Clock (Pin or Term)
PD Low to Valid Output
Power-down AC Characteristics
(2)
(2)
Don’t Care after PD High
Don’t Care after PD High
(2)
(2)
before PD High
before PD High
SSO
.
(1)(2)
Min
10
10
10
-5/-7
ATF1502BE
Max
5
5
5
2
2
2
2
Units
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
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