EPM3032ATC44-7 Altera, EPM3032ATC44-7 Datasheet - Page 15
![IC MAX 3000A CPLD 32 44-TQFP](/photos/6/70/67053/544-44-tqfp_sml.jpg)
EPM3032ATC44-7
Manufacturer Part Number
EPM3032ATC44-7
Description
IC MAX 3000A CPLD 32 44-TQFP
Manufacturer
Altera
Series
MAX® 3000Ar
Datasheet
1.EPM3032ATC44-10N.pdf
(46 pages)
Specifications of EPM3032ATC44-7
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.5ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
2
Number Of Macrocells
32
Number Of Gates
600
Number Of I /o
34
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-TQFP, 44-VQFP
Voltage
3.0 V ~ 3.6 V
Memory Type
EEPROM
Number Of Logic Elements/cells
2
Family Name
MAX 3000A
# Macrocells
32
Number Of Usable Gates
600
Frequency (max)
166.67MHz
Propagation Delay Time
7.5ns
Number Of Logic Blocks/elements
2
# I/os (max)
34
Operating Supply Voltage (typ)
3.3V
In System Programmable
Yes
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
44
Package Type
TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1153
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM3032ATC44-7
Manufacturer:
ALTERA
Quantity:
30
Part Number:
EPM3032ATC44-7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Part Number:
EPM3032ATC44-7N/I44-10N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Altera Corporation
By combining the pulse and shift times for each of the programming
stages, the program or verify time can be derived as a function of the TCK
frequency, the number of devices, and specific target device(s). Because
different ISP-capable devices have a different number of EEPROM cells,
both the total fixed and total variable times are unique for a single device.
Programming a Single MAX 3000A Device
The time required to program a single MAX 3000A device in-system can
be calculated from the following formula:
where: t
The ISP times for a stand-alone verification of a single MAX 3000A device
can be calculated from the following formula:
where: t
t
t
PROG
VER
=
=
t
VPULSE
t
Cycle
f
t
Cycle
TCK
t
PROG
PPULSE
VER
VPULSE
PPULSE
PTCK
VTCK
+
MAX 3000A Programmable Logic Device Family Data Sheet
+
Cycle
--------------------------------
Cycle
------------------------------- -
= Programming time
= Sum of the fixed times to erase, program, and
= Number of TCK cycles to program a device
= TCK frequency
f
= Verify time
= Sum of the fixed times to verify the EEPROM cells
= Number of TCK cycles to verify a device
TCK
f
TCK
VTCK
verify the EEPROM cells
PTCK
15