EPM3064ATC100-10N Altera, EPM3064ATC100-10N Datasheet - Page 19
![IC MAX 3000A CPLD 64 100-TQFP](/photos/6/70/67055/544-100-tqfp_sml.jpg)
EPM3064ATC100-10N
Manufacturer Part Number
EPM3064ATC100-10N
Description
IC MAX 3000A CPLD 64 100-TQFP
Manufacturer
Altera
Series
MAX® 3000Ar
Datasheet
1.EPM3032ATC44-10N.pdf
(46 pages)
Specifications of EPM3064ATC100-10N
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
10.0ns
Voltage Supply - Internal
3 V ~ 3.6 V
Number Of Logic Elements/blocks
4
Number Of Macrocells
64
Number Of Gates
1250
Number Of I /o
66
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
3.0 V ~ 3.6 V
Memory Type
EEPROM
Number Of Logic Elements/cells
4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Other names
544-1974
EPM3064ATC100-10N
EPM3064ATC100-10N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EPM3064ATC100-10N
Manufacturer:
ALTERA
Quantity:
9 500
Company:
Part Number:
EPM3064ATC100-10N
Manufacturer:
ALTERA
Quantity:
9
Company:
Part Number:
EPM3064ATC100-10N
Manufacturer:
ALTERA105
Quantity:
2 560
Part Number:
EPM3064ATC100-10N
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Altera Corporation
Figure 7
Figure 7. MAX 3000A JTAG Waveforms
Table 10
devices.
Captured
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
JCP
JCH
JCL
JPSU
JPH
JPCO
JPZX
JPXZ
JSSU
JSH
JSCO
JSZX
JSXZ
Table 10. JTAG Timing Parameters & Values for MAX 3000A Devices
Driven
Signal
Signal
to Be
to Be
TMS
TDO
TCK
TDI
shows the timing information for the JTAG signals.
shows the JTAG timing parameters and values for MAX 3000A
TCK clock period
TCK clock high time
TCK clock low time
JTAG port setup time
JTAG port hold time
JTAG port clock to output
JTAG port high impedance to valid output
JTAG port valid output to high impedance
Capture register setup time
Capture register hold time
Update register clock to output
Update register high impedance to valid output
Update register valid output to high impedance
t
JCH
MAX 3000A Programmable Logic Device Family Data Sheet
t
t
JPZX
JSZX
t
JCP
t
JSSU
t
JCL
Parameter
t
JSH
t
t
JPCO
JSCO
t
JPSU
t
t
JSXZ
JPH
Min
100
50
50
20
45
20
45
t
Max
JPXZ
25
25
25
25
25
25
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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