EPM570GT100C5 Altera, EPM570GT100C5 Datasheet - Page 14

IC MAX II CPLD 570 LE 100-TQFP

EPM570GT100C5

Manufacturer Part Number
EPM570GT100C5
Description
IC MAX II CPLD 570 LE 100-TQFP
Manufacturer
Altera
Series
MAX® IIr
Datasheets

Specifications of EPM570GT100C5

Programmable Type
In System Programmable
Delay Time Tpd(1) Max
5.4ns
Voltage Supply - Internal
1.71 V ~ 1.89 V
Number Of Logic Elements/blocks
570
Number Of Macrocells
440
Number Of I /o
76
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
100-TQFP, 100-VQFP
Voltage
1.8V
Memory Type
FLASH
Number Of Logic Elements/cells
570
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Other names
544-1308

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2–6
Figure 2–5. LAB-Wide Control Signals
Logic Elements
MAX II Device Handbook
Dedicated
LAB Column
Clocks
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
Local
Interconnect
The smallest unit of logic in the MAX II architecture, the LE, is compact and provides
advanced features with efficient logic utilization. Each LE contains a four-input LUT,
which is a function generator that can implement any function of four variables. In
addition, each LE contains a programmable register and carry chain with carry-select
capability. A single LE also supports dynamic single-bit addition or subtraction mode
selectable by an LAB-wide control signal. Each LE drives all types of interconnects:
local, row, column, LUT chain, register chain, and DirectLink interconnects. See
Figure
2–6.
4
labclk1
labclkena1
labclk2
labclkena2
asyncload
or labpre
syncload
labclr1
© October 2008 Altera Corporation
Chapter 2: MAX II Architecture
labclr2
synclr
Logic Elements
addnsub

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