XC9572-15PC44C Xilinx Inc, XC9572-15PC44C Datasheet - Page 4

• Manufacturer Part Number: XC9572-15PC44C
• Description: IC CPLD 72 MACROCELL 44-PLCC
• Manufacturer: Xilinx Inc
• Series: XC9500r

Specifications of XC9572-15PC44C

• Programmable Type: In System Programmable (min 10K program/erase cycles)
• Delay Time Tpd(1) Max: 15.0ns
• Voltage Supply - Internal: 4.75 V ~ 5.25 V
• Number Of Logic Elements/blocks: 4
• Number Of Macrocells: 72
• Number Of Gates: 1600
• Number Of I /o: 34
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-PLCC
• Voltage: 5V
• Memory Type: FLASH
• Circuit Type: Advanced, FastFLASH™
• Current, Supply: 65 mA
• Function Type: 16-Bits
• Logic Function: Programmable
• Logic Type: CMOS
• Number Of Pins: 44
• Package Type: PLCC-44
• Power Requirements: -0.5 to 7 V
• Setup Time: 8 ns (Min.)
• Special Features: Parallel, Tri-State
• Temperature, Operating, Range: -40 to +85 °C
• Voltage, Supply: 5.5 V
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Number Of Logic Elements/cells: -
• Other names: 122-1171

Internal Timing Parameters
Notes:
1.
DS065 (v4.3)
Product Specification
Symbol
Buffer Delays
Product Term Control Delays
Internal Register and Combinatorial Delays
Feedback Delays
Time Adders
T
T
T
T
T
T
T
T
T
T
T
LOGILP
T
T
T
T
T
PTA
T
SLEW
PTCK
PTSR
T
T
PTTS
T
LOGI
GCK
GSR
GTS
OUT
T
COI
AOI
PDI
SUI
RAI
T
EN
LF
IN
HI
F
PTA
(1)
is multiplied by the span of the function as defined in the XC9500 family data sheet.
Input buffer delay
GCK buffer delay
GSR buffer delay
GTS buffer delay
Output buffer delay
Output buffer enable/disable delay
Product term clock delay
Product term set/reset delay
Product term 3-state delay
Combinatorial logic propagation delay
Register setup time
Register hold time
Register clock to output valid time
Register async. S/R to output delay
Register async. S/R recover before clock
Internal logic delay
Internal low power logic delay
FastCONNECT feedback delay
Function block local feedback delay
Incremental product term allocator delay
Slew-rate limited delay
R
Parameter
Min
1.5
3.0
7.5
XC9572-7
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
10.0
2.5
1.5
4.5
5.5
2.5
3.0
2.0
4.5
0.5
0.5
6.5
2.0
8.0
4.0
1.0
4.0
0
-
-
-
XC9572 In-System Programmable CPLD
10.0
Min
2.5
3.5
XC9572-10
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
11.0
3.5
2.5
6.0
6.0
3.0
3.0
2.5
3.5
1.0
0.5
7.0
2.5
9.5
3.5
1.0
4.5
0
-
-
-
10.0
Min
3.5
4.5
XC9572-15
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
11.0
11.5
11.0
4.5
3.0
7.5
4.5
2.5
3.0
5.0
3.0
0.5
8.0
3.0
3.5
1.0
5.0
0
-
-
-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns