XC2C128-7TQG144I Xilinx Inc, XC2C128-7TQG144I Datasheet - Page 17
![IC CR-II CPLD 128MCELL 144TQFP](/photos/6/70/67094/144tqfp_sml.jpg)
XC2C128-7TQG144I
Manufacturer Part Number
XC2C128-7TQG144I
Description
IC CR-II CPLD 128MCELL 144TQFP
Manufacturer
Xilinx Inc
Series
CoolRunner IIr
Specifications of XC2C128-7TQG144I
Operating Temperature
-40°C ~ 85°C
Programmable Type
In System Programmable
Delay Time Tpd(1) Max
7.0ns
Voltage Supply - Internal
1.7 V ~ 1.9 V
Number Of Logic Elements/blocks
8
Number Of Macrocells
128
Number Of Gates
3000
Number Of I /o
100
Mounting Type
Surface Mount
Package / Case
144-TQFP, 144-VQFP
Features
JTAG
Voltage
1.8V
Memory Type
CMOS
No. Of Macrocells
128
No. Of I/o's
100
Propagation Delay
5.7ns
Global Clock Setup Time
2.4ns
Frequency
244MHz
Supply Voltage Range
1.7V To 1.9V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Logic Elements/cells
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Warranty Disclaimer
THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED
AT http://www.xilinx.com/warranty.htm. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF THE
PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE
THEN-CURRENT XILINX DATA SHEET FOR THE PRODUCTS. PRODUCTS ARE NOT DESIGNED TO BE FAIL-SAFE
AND ARE NOT WARRANTED FOR USE IN APPLICATIONS THAT POSE A RISK OF PHYSICAL HARM OR LOSS OF
LIFE. USE OF PRODUCTS IN SUCH APPLICATIONS IS FULLY AT THE RISK OF CUSTOMER SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
DS093 (v3.2) March 8, 2007
Product Specification
R
V
CCIO1
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
GND
GND
V
AUX
NC
NC
NC
NC
NC
CC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
(1)
(1)
(1)
(1)
(2)
(2)
(4)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
1
2
3
4
5
6
7
8
9
Figure 8: TQ144 Thin Quad Flat Pack
Top View
www.xilinx.com
TQ144
(1) - Global Output Enable
(2) - Global Clock
(3) - Global Set/Reset
(4) - Clock Divide Reset
(5) - DataGATE Enable
XC2C128 CoolRunner-II CPLD
108
107
106
105
104
103
102
101
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
75
74
73
GND
NC
NC
I/O
I/O
I/O
I/O
I/O
I/O
GND
I/O
I/O
I/O
I/O
I/O
V
I/O
I/O
GND
GND
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
NC
I/O
V
CCIO1
CC
CCIO1
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