ADSP-2195MBCA-140 Analog Devices Inc, ADSP-2195MBCA-140 Datasheet - Page 20

• Manufacturer Part Number: ADSP-2195MBCA-140
• Description: IC DSP CONTROLLER 16BIT 144MBGA
• Manufacturer: Analog Devices Inc
• Series: ADSP-21xxr
• Type: Fixed Pointr

Specifications of ADSP-2195MBCA-140

• Rohs Status: RoHS non-compliant
• Interface: Host Interface, SPI, SSP, UART
• Clock Rate: 140MHz
• Non-volatile Memory: ROM (48 kB)
• On-chip Ram: 80kB
• Voltage - I/o: 3.30V
• Voltage - Core: 2.50V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 144-MBGA, 144-Mini-BGA

ADSP-2195
Table 7. Pin Descriptions (Continued)
20
Pin
MS3–0
BR
BG
BGH
HAD15–0
HA16
HACK_P
HRD
HWR
HACK
HALE
HCMS
HCIOMS
CLKIN
XTAL
BMODE1–0
OPMODE
CLKOUT
BYPASS
RCLK1–0
RCLK2/SCK1
RFS1–0
RFS2/MOSI1
TCLK1–0
TCLK2/SCK0
TFS1–0
TFS2/MOSI0
DR1–0
DR2/MISO1
DT1–0
This information applies to a product under development. Its characteristics and specifications are subject to change with-
out notice. Analog Devices assumes no obligation regarding future manufacturing unless otherwise agreed to in writing.
Type
O/T
I
O
O
I/O/T
I
I
I
I
O
I
I
I
I
O
I
I
O
I
I/O/T
I/O/T
I/O/T
I/O/T
I/O/T
I/O/T
I/O/T
I/O/T
I/T
I/O/T
O/T
Function
External Port Memory Space Selects
External Port Bus Request
External Port Bus Grant
External Port Bus Grant Hang
Host Port Multiplexed Address and Data Bus
Host Port MSB of Address Bus
Host Port ACK Polarity
Host Port Read Strobe
Host Port Write Strobe
Host Port Access Ready Acknowledge
Host Port Address Latch Strobe or Address Cycle Control
Host Port Internal Memory–Internal I/O Memory–Boot Memory Select
Host Port Internal I/O Memory Select
Clock Input/Oscillator input
Oscillator output
Boot Mode 1–0. The BMODE1 and BMODE0 pins have 85 k internal pull-up resistors.
Operating Mode. The OPMODE pin has a 85 k internal pull-up resistor.
Clock Output
Phase-Lock-Loop (PLL) Bypass mode. The BYPASS pin has a 85 k internal pull-up
resistor.
SPORT1–0 Receive Clock
SPORT2 Receive Clock/SPI1 Serial Clock
SPORT1–0 Receive Frame Sync
SPORT2 Receive Frame Sync/SPI1 Master-Output, Slave-Input data
SPORT1–0 Transmit Clock
SPORT2 Transmit Clock/SPI0 Serial Clock
SPORT1–0 Transmit Frame Sync
SPORT2 Transmit Frame Sync/SPI0 Master-Output, Slave-Input data
SPORT1–0 Serial Data Receive
SPORT2 Serial Data Receive/SPI1 Master-Input, Slave-Output data
SPORT1–0 Serial Data Transmit
For current information contact Analog Devices at 800/262-5643
September 2001
REV. PrA