EP1C6T144C8 Altera, EP1C6T144C8 Datasheet - Page 48
![IC CYCLONE FPGA 5980 LE 144-TQFP](/photos/6/70/67061/544-144-tqfp_sml.jpg)
EP1C6T144C8
Manufacturer Part Number
EP1C6T144C8
Description
IC CYCLONE FPGA 5980 LE 144-TQFP
Manufacturer
Altera
Series
Cyclone®r
Datasheet
1.EP1C3T144C8.pdf
(106 pages)
Specifications of EP1C6T144C8
Number Of Logic Elements/cells
5980
Number Of Labs/clbs
598
Total Ram Bits
92160
Number Of I /o
98
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
144-TQFP, 144-VQFP
Family Name
Cyclone®
Number Of Logic Blocks/elements
5980
# I/os (max)
98
Frequency (max)
275.03MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
5980
Ram Bits
92160
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
144
Package Type
TQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1058
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1C6T144C8
Manufacturer:
ALTERA
Quantity:
7
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Part Number:
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Manufacturer:
ALTERA
Quantity:
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Part Number:
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Manufacturer:
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Company:
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Manufacturer:
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Part Number:
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Manufacturer:
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Part Number:
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Manufacturer:
ALTERA
Quantity:
20 000
Cyclone Device Handbook, Volume 1
Figure 2–29. Column I/O Block Connection to the Interconnect
Notes to
(1)
(2)
2–42
Preliminary
The 21 data and control signals consist of three data out lines, io_dataout[2..0], three output enables,
io_coe[2..0], three input clock enables, io_cce_in[2..0], three output clock enables, io_cce_out[2..0],
three clocks, io_cclk[2..0], three asynchronous clear signals, io_caclr[2..0], and three synchronous clear
signals, io_csclr[2..0].
Each of the three IOEs in the column I/O block can have one io_datain input (combinatorial or registered) and
one comb_io_datain (combinatorial) input.
Local Interconnect
Figure
from Logic Array (1)
R4 Interconnects
I/O Block
Control Signals
2–29:
21 Data &
LAB Local
Interconnect
LAB
21
comb_io_datain[2..0]
C4 Interconnects
IO_datain[2:0] &
Column I/O Block
LAB
(2)
LAB
Altera Corporation
Column I/O
Block Contains
up to Three IOEs
io_clk[5..0]
May 2008