EPF81500AQC240-2 Altera, EPF81500AQC240-2 Datasheet - Page 53

IC FLEX 8000A FPGA 16K 240-PQFP

EPF81500AQC240-2

Manufacturer Part Number
EPF81500AQC240-2
Description
IC FLEX 8000A FPGA 16K 240-PQFP
Manufacturer
Altera
Series
FLEX 8000r
Datasheet

Specifications of EPF81500AQC240-2

Number Of Logic Elements/cells
1296
Number Of Labs/clbs
162
Number Of I /o
181
Number Of Gates
16000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
240-MQFP, 240-PQFP
Family Name
FLEX 8000
Number Of Usable Gates
16000
Number Of Logic Blocks/elements
1296
# Registers
1500
# I/os (max)
181
Frequency (max)
125MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
5V
Logic Cells
1296
Ram Bits
8
Device System Gates
16000
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
240
Package Type
PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Total Ram Bits
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-2249

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Altera Corporation
Operating Modes
The FLEX 8000 architecture uses SRAM elements that require
configuration data to be loaded whenever the device powers up and
begins operation. The process of physically loading the SRAM
programming data into the device is called configuration. During
initialization, which occurs immediately after configuration, the device
resets registers, enables I/O pins, and begins to operate as a logic device.
The I/O pins are tri-stated during power-up, and before and during
configuration. The configuration and initialization processes together are
called command mode; normal device operation is called user mode.
SRAM elements allow FLEX 8000 devices to be reconfigured in-circuit
with new programming data that is loaded into the device. Real-time
reconfiguration is performed by forcing the device into command mode
with a device pin, loading different programming data, reinitializing the
device, and resuming user-mode operation. The entire reconfiguration
process requires less than 100 ms and can be used to dynamically
reconfigure an entire system. In-field upgrades can be performed by
distributing new configuration files.
Configuration Schemes
The configuration data for a FLEX 8000 device can be loaded with one of
six configuration schemes, chosen on the basis of the target application.
Both active and passive schemes are available. In the active configuration
schemes, the FLEX 8000 device functions as the controller, directing the
loading operation, controlling external configuration devices, and
completing the loading process. The clock source for all active
configuration schemes is an oscillator on the FLEX 8000 device that
operates between 2 MHz and 6 MHz. In the passive configuration
schemes, an external controller guides the FLEX 8000 device.
shows the data source for each of the six configuration schemes.
Table 51. Data Source for Configuration
Active serial
Active parallel up
Active parallel down
Passive serial
Passive parallel synchronous
Passive parallel asynchronous
Configuration Scheme
FLEX 8000 Programmable Logic Device Family Data Sheet
Acronym
AS
APU
APD
PS
PPS
PPA
Altera configuration device
Parallel configuration device
Parallel configuration device
Serial data path
Intelligent host
Intelligent host
Data Source
Table 51
53
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