EP1K10FC256-3 Altera, EP1K10FC256-3 Datasheet - Page 51

IC ACEX 1K FPGA 10K 256-FBGA

EP1K10FC256-3

Manufacturer Part Number
EP1K10FC256-3
Description
IC ACEX 1K FPGA 10K 256-FBGA
Manufacturer
Altera
Series
ACEX-1K®r
Datasheet

Specifications of EP1K10FC256-3

Number Of Logic Elements/cells
576
Number Of Labs/clbs
72
Total Ram Bits
12288
Number Of I /o
136
Number Of Gates
56000
Voltage - Supply
2.375 V ~ 2.625 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 70°C
Package / Case
256-FBGA
Family Name
ACEX™ 1K
Number Of Usable Gates
10000
Number Of Logic Blocks/elements
576
# I/os (max)
136
Frequency (max)
200MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
2.5V
Logic Cells
576
Ram Bits
12288
Device System Gates
56000
Operating Supply Voltage (min)
2.375V
Operating Supply Voltage (max)
2.625V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
544-1026

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Figure 24. ACEX 1K Device Timing Model
Figure 25. ACEX 1K Device LE Timing Model
Clock/Input
Dedicated
Control-In
Data-In
Carry-In
Figure 24
to and from the various elements of the ACEX 1K device.
Figures 25
and functions within the LE, IOE, EAB, and bidirectional timing models.
Packed Register
Register Control
Carry Chain
t
t
t
t
t
t
t
t
t
LUT Delay
PACKED
LUT
RLUT
CLUT
C
EN
CGEN
CGENR
CICO
shows the overall timing model, which maps the possible paths
Delay
Delay
Delay
through
t
Element
Cascade-In
LABCARRY
Carry-Out
Logic
ACEX 1K Programmable Logic Device Family Data Sheet
28
show the delays that correspond to various paths
Interconnect
Cascade-Out
t
LABCASC
t
CASC
Embedded Array
Block
Register
Delays
t
t
t
t
t
t
COMB
H
PRE
CLR
CO
SU
Data-Out
I/O Element
51
13

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