EP3C16F256C8 Altera, EP3C16F256C8 Datasheet - Page 26

IC CYCLONE III FPGA 16K 256FBGA

EP3C16F256C8

Manufacturer Part Number
EP3C16F256C8
Description
IC CYCLONE III FPGA 16K 256FBGA
Manufacturer
Altera
Series
Cyclone® IIIr

Specifications of EP3C16F256C8

Number Of Logic Elements/cells
15408
Number Of Labs/clbs
963
Total Ram Bits
516096
Number Of I /o
168
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200P0037 - BOARD DEV/EDUCATION ALTERA DE0544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-2461

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Page 26
Board Design Considerations
MSEL Configuration Mode Pins
Select the configuration scheme by driving the Cyclone III device MSEL pins either
high or low. The MSEL pins are powered by the V
power supply of the bank in
CCINT
Ω
which they reside. The MSEL[3..0] pins have 5-k
internal pull-down resistors that
are always active. During power-on reset (POR) and during reconfiguration, the MSEL
pins have to be at least LVTTL V
or V
levels to be considered a logic low or logic
IL
IH
high, respectively. To avoid any problems with detecting an incorrect configuration
scheme, hardwire the MSEL pins to V
and GND without any pull-up or pull-down
CCA
resistors. Alternatively, set up your board so that you can connect each pin to either
Ω
V
or GND with a 0-
resistor to change between configuration modes during
CCA
testing or debugging. Altera recommends not to drive the MSEL pins with a
microprocessor or another device.
1
Do not leave the MSEL pins floating.
f
For more information about configuration, refer to the
Configuring Cyclone III Devices
chapter in volume 1 of the Cyclone III Device Handbook. Also refer to the
Configuration
Center, which includes links to troubleshooters that you can use to help debug
configuration problems. To help you debug JTAG programming issues, refer to the
JTAG Configuration & ISP
Troubleshooter. To debug FPGA configuration issues, refer
to the
FPGA Configuration
Troubleshooter.
© November 2008 Altera Corporation

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