EPF10K10QC208-4N Altera, EPF10K10QC208-4N Datasheet - Page 18

IC FLEX 10K FPGA 10K 208-PQFP

EPF10K10QC208-4N

Manufacturer Part Number
EPF10K10QC208-4N
Description
IC FLEX 10K FPGA 10K 208-PQFP
Manufacturer
Altera
Series
FLEX-10K®r
Datasheet

Specifications of EPF10K10QC208-4N

Number Of Logic Elements/cells
576
Number Of Labs/clbs
72
Total Ram Bits
6144
Number Of I /o
134
Number Of Gates
31000
Voltage - Supply
4.75 V ~ 5.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Family Name
FLEX 10K
Number Of Usable Gates
10000
Number Of Logic Blocks/elements
576
# I/os (max)
134
Frequency (max)
125MHz
Process Technology
CMOS
Operating Supply Voltage (typ)
5V
Logic Cells
576
Ram Bits
6144
Device System Gates
31000
Operating Supply Voltage (min)
4.75V
Operating Supply Voltage (max)
5.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
544-2197

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0
18
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
LE Operating Modes
The FLEX 10K LE can operate in the following four modes:
Each of these modes uses LE resources differently. In each mode, seven
available inputs to the LE—the four data inputs from the LAB local
interconnect, the feedback from the programmable register, and the
carry-in and cascade-in from the previous LE—are directed to different
destinations to implement the desired logic function. Three inputs to the
LE provide clock, clear, and preset control for the register. The Altera
software, in conjunction with parameterized functions such as LPM and
DesignWare functions, automatically chooses the appropriate mode for
common functions such as counters, adders, and multipliers. If required,
the designer can also create special-purpose functions which use a specific
LE operating mode for optimal performance.
The architecture provides a synchronous clock enable to the register in all
four modes. The Altera software can set DATA1 to enable the register
synchronously, providing easy implementation of fully synchronous
designs.
Figure 9
Normal mode
Arithmetic mode
Up/down counter mode
Clearable counter mode
shows the LE operating modes.
Altera Corporation

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