EP3C25F256C8N Altera, EP3C25F256C8N Datasheet - Page 65
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EP3C25F256C8N
Manufacturer Part Number
EP3C25F256C8N
Description
IC CYCLONE III FPGA 25K 256-FBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
Specifications of EP3C25F256C8N
Number Of Logic Elements/cells
24624
Number Of Labs/clbs
1539
Total Ram Bits
608256
Number Of I /o
156
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-FBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.544-2370 - KIT STARTER CYCLONE III EP3C25
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2077
EP3C25F256C8NES
EP3C25F256C8NES
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP3C25F256C8N
Manufacturer:
ALTERA
Quantity:
1
Part Number:
EP3C25F256C8N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Chapter 2: Cyclone III LS Device Data Sheet
Switching Characteristics
© December 2009
Altera Corporation
Table 2–30. Cyclone III LS Devices Emulated LVDS with Three-Resistor Network Transmitter Timing
Specifications
Table 2–31. Cyclone III LS Devices LVDS Receiver Timing Specifications
f
frequency)
HSIODR
t
TCCS
Output jitter
(peak to peak)
t
Notes to
(1) Emulated LVDS with three-resistor network transmitter is supported at the output pin of all I/O banks.
(2) t
(Part 1 of 2) (Preliminary)
f
frequency)
HSIODR
SW
HSC LK
DUTY
LOCK
HSC LK
(2)
LOC K
Symbol
Symbol
(input clock
(input clock
Table
is the time required for the PLL to lock from the end of device configuration.
2–30:
(Note 1)
Modes
Modes
(Preliminary)
×10
×10
×10
×10
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
—
×8
×7
×4
×2
×1
×8
×7
×4
×2
×1
—
—
—
—
Min
100
Min
100
10
10
10
10
10
10
80
70
40
20
10
—
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
C7 and I7
C7 and I7
402.5
402.5
402.5
402.5
Max
Max
370
370
370
370
370
740
740
740
740
740
400
320
320
320
320
320
640
640
640
640
640
200
500
55
1
Cyclone III Device Handbook, Volume 2
Min
100
Min
100
10
10
10
10
10
10
80
70
40
20
10
—
10
10
10
10
10
10
80
70
40
20
10
45
—
—
—
(Note 1)
C8
C8
402.5
402.5
402.5
402.5
Max
Max
320
320
320
320
320
640
640
640
640
640
400
275
275
275
275
275
550
550
550
550
550
200
550
55
1
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
Mbps
MHz
MHz
MHz
MHz
MHz
MHz
Unit
Unit
MHz
MHz
MHz
MHz
MHz
MHz
ms
ps
ps
%
%
2–21