EP3C40F484C8N Altera, EP3C40F484C8N Datasheet - Page 26

IC CYCLONE III FPGA 40K 484FBGA

EP3C40F484C8N

Manufacturer Part Number
EP3C40F484C8N
Description
IC CYCLONE III FPGA 40K 484FBGA
Manufacturer
Altera
Series
Cyclone® IIIr

Specifications of EP3C40F484C8N

Number Of Logic Elements/cells
39600
Number Of Labs/clbs
2475
Total Ram Bits
1161216
Number Of I /o
331
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
484-FBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
39600
# I/os (max)
331
Frequency (max)
402MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
39600
Ram Bits
1161216
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
484
Package Type
FBGA
No. Of Logic Blocks
2475
Family Type
Cyclone III
No. Of I/o's
331
I/o Supply Voltage
3.3V
Operating Frequency Max
402MHz
Operating Temperature Range
0°C To +85°C
Rohs Compliant
Yes
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2492

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Page 26
Board Design Considerations
MSEL Configuration Mode Pins
Select the configuration scheme by driving the Cyclone III device MSEL pins either
high or low. The MSEL pins are powered by the V
power supply of the bank in
CCINT
Ω
which they reside. The MSEL[3..0] pins have 5-k
internal pull-down resistors that
are always active. During power-on reset (POR) and during reconfiguration, the MSEL
pins have to be at least LVTTL V
or V
levels to be considered a logic low or logic
IL
IH
high, respectively. To avoid any problems with detecting an incorrect configuration
scheme, hardwire the MSEL pins to V
and GND without any pull-up or pull-down
CCA
resistors. Alternatively, set up your board so that you can connect each pin to either
Ω
V
or GND with a 0-
resistor to change between configuration modes during
CCA
testing or debugging. Altera recommends not to drive the MSEL pins with a
microprocessor or another device.
1
Do not leave the MSEL pins floating.
f
For more information about configuration, refer to the
Configuring Cyclone III Devices
chapter in volume 1 of the Cyclone III Device Handbook. Also refer to the
Configuration
Center, which includes links to troubleshooters that you can use to help debug
configuration problems. To help you debug JTAG programming issues, refer to the
JTAG Configuration & ISP
Troubleshooter. To debug FPGA configuration issues, refer
to the
FPGA Configuration
Troubleshooter.
© November 2008 Altera Corporation

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