EP1S10F672C7 Altera, EP1S10F672C7 Datasheet - Page 137

• Manufacturer Part Number: EP1S10F672C7
• Description: IC STRATIX FPGA 10K LE 672-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S10F672C7

• Number Of Logic Elements/cells: 10570
• Number Of Labs/clbs: 1057
• Total Ram Bits: 920448
• Number Of I /o: 345
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 672-FBGA
• Family Name: Stratix
• Number Of Logic Blocks/elements: 10570
• # I/os (max): 345
• Frequency (max): 420.17MHz
• Process Technology: 0.13um (CMOS)
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 10570
• Ram Bits: 920448
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 672
• Package Type: FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-1109

Altera Corporation
July 2005
Notes to
(1)
(2)
LVTTL
LVCMOS
2.5 V
1.8 V
1.5 V
3.3-V PCI
3.3-V PCI-X 1.0
LVDS
LVPECL
3.3-V PCML
HyperTransport
Differential HSTL
Differential SSTL
GTL
GTL+
1.5-V HSTL Class I and II
1.8-V HSTL Class I and II
SSTL-18 Class I and II
SSTL-2 Class I and II
SSTL-3 Class I and II
AGP (1× and 2
CTT
Table 2–31. Stratix Supported I/O Standards
This I/O standard is only available on input and output clock pins.
This I/O standard is only available on output column clock pins.
I/O Standard
Table
2–31:
°
)
(2)
(1)
Voltage-referenced
Voltage-referenced
Voltage-referenced
Voltage-referenced
Voltage-referenced
Voltage-referenced
Voltage-referenced
Voltage-referenced
Voltage-referenced
■
■
■
■
■
Table 2–31
Single-ended
Single-ended
Single-ended
Single-ended
Single-ended
Single-ended
Single-ended
Differential
Differential
Differential
Differential
Differential
Differential
1.8-V HSTL Class I and II
SSTL-3 Class I and II
SSTL-2 Class I and II
SSTL-18 Class I and II
CTT
Type
describes the I/O standards supported by Stratix devices.
Input Reference
Voltage (V
0.75
1.25
0.75
0.90
1.25
1.32
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
(V)
0.8
1.0
0.9
1.5
1.5
REF
)
Voltage (V
Stratix Device Handbook, Volume 1
Output Supply
N/A
N/A
(V)
3.3
3.3
2.5
1.8
1.5
3.3
3.3
3.3
3.3
3.3
2.5
1.5
2.5
1.5
1.8
1.8
2.5
3.3
3.3
3.3
CCIO
)
Stratix Architecture
Voltage (V
Termination
Board
0.75
1.25
1.20
0.75
0.90
1.25
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
(V)
1.5
0.9
1.5
1.5
2–123
TT
)