EP4CGX110CF23I7N Altera, EP4CGX110CF23I7N Datasheet - Page 123
EP4CGX110CF23I7N
Manufacturer Part Number
EP4CGX110CF23I7N
Description
IC CYCLONE IV FPGA 110K 484FBGA
Manufacturer
Altera
Series
CYCLONE® IV GXr
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CGX110CF23I7N
Number Of Logic Elements/cells
109424
Number Of Labs/clbs
6839
Total Ram Bits
5490000
Number Of I /o
270
Voltage - Supply
1.16 V ~ 1.24 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
484-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Chapter 6: I/O Features in Cyclone IV Devices
Termination Scheme for I/O Standards
Differential I/O Standard Termination
Figure 6–7. Cyclone IV Devices Differential HSTL I/O Standard Class I and Class II Interface and Termination
Figure 6–8. Cyclone IV Devices Differential SSTL I/O Standard Class I and Class II Interface and Termination
Note to
(1) Only Differential SSTL-2 I/O standard supports Class II output.
© December 2010 Altera Corporation
Figure
Termination
Termination
On-Board
Termination
Termination
External
On-Board
External
OCT
6–8:
OCT
Cyclone IV Device
Family Series OCT
Cyclone IV Device
Family Series OCT
Differential I/O standards typically require a termination resistor between the two
signals at the receiver. The termination resistor must match the differential load
impedance of the bus (refer to
Cyclone IV devices support differential SSTL-2 and SSTL-18, differential HSTL-18,
HSTL-15, and HSTL-12, PPDS, LVDS, RSDS, mini-LVDS, and differential LVPECL.
Transmitter
Transmitter
Transmitter
Transmitter
50
50
Ω
Ω
Differential HSTL Class I
Differential SSTL Class I
25 Ω
25 Ω
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
50Ω
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
V TT
V TT
V TT
V TT
50 Ω
50 Ω
50 Ω
50 Ω
V TT
V TT
V TT
V TT
Receiver
Receiver
Receiver
Receiver
Figure 6–7
Cyclone IV Device
Family Series OCT
Cyclone IV Device
Family Series OCT
Transmitter
Transmitter
Transmitter
Transmitter
25
25
Ω
Ω
and
Figure
50 Ω
50 Ω
V TT
V TT
25 Ω
25 Ω
Differential SSTL Class II
V TT V TT
50 Ω
50 Ω
V TT V TT
Differential HSTL Class II
V TT
V TT
50 Ω
50 Ω
50 Ω
6–8).
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
50 Ω
50Ω
50 Ω
Cyclone IV Device Handbook, Volume 1
V TT V TT
V TT
V TT
V TT V TT
50 Ω
50 Ω
50 Ω
V TT
V TT
50 Ω
Receiver
Receiver
Receiver
Receiver
(Note 1)
6–15
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