EPF10K100ABC356-3 Altera, EPF10K100ABC356-3 Datasheet - Page 3

• Manufacturer Part Number: EPF10K100ABC356-3
• Description: IC FLEX 10KA FPGA 100K 356-BGA
• Manufacturer: Altera
• Series: FLEX-10K®r

Specifications of EPF10K100ABC356-3

• Number Of Logic Elements/cells: 624
• Number Of Labs/clbs: 624
• Total Ram Bits: 24576
• Number Of I /o: 274
• Number Of Gates: 158000
• Voltage - Supply: 3 V ~ 3.6 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 356-BGA
• Family Name: FLEX 10KA
• Number Of Usable Gates: 100000
• Number Of Logic Blocks/elements: 4992
• # Registers: 1218
• # I/os (max): 274
• Frequency (max): 125MHz
• Process Technology: CMOS
• Operating Supply Voltage (typ): 3.3V
• Logic Cells: 4992
• Ram Bits: 24567
• Device System Gates: 158000
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 356
• Package Type: BGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: 544-2191

Altera Corporation
Flexible interconnect
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Powerful I/O pins
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Peripheral register for fast setup and clock-to-output delay
Flexible package options
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Software design support and automatic place-and-route provided by
Altera development systems for Windows-based PCs and Sun
SPARCstation, HP 9000 Series 700/800 workstations
Additional design entry and simulation support provided by EDIF
2 0 0 and 3 0 0 netlist files, library of parameterized modules (LPM),
DesignWare components, Verilog HDL, VHDL, and other interfaces
to popular EDA tools from manufacturers such as Cadence,
Exemplar Logic, Mentor Graphics, OrCAD, Synopsys, Synplicity,
VeriBest, and Viewlogic
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
FastTrack
predictable interconnect delays
Dedicated carry chain that implements arithmetic functions such
as fast adders, counters, and comparators (automatically used by
software tools and megafunctions)
Dedicated cascade chain that implements high-speed,
high-fan-in logic functions (automatically used by software tools
and megafunctions)
Tri-state emulation that implements internal tri-state buses
Up to six global clock signals and four global clear signals
Individual tri-state output enable control for each pin
Open-drain option on each I/O pin
Programmable output slew-rate control to reduce switching
noise
FLEX 10KA devices support hot-socketing
Available in a variety of packages with 84 to 600 pins (see
Tables 4
Pin-compatibility with other FLEX 10K devices in the same
package
FineLine BGA
and 5)
®
Interconnect continuous routing structure for fast,
TM
packages maximize board space efficiency
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