EP2C70F896C6N Altera, EP2C70F896C6N Datasheet - Page 92

• Manufacturer Part Number: EP2C70F896C6N
• Description: IC CYCLONE II FPGA 70K 896-FBGA
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C70F896C6N

• Number Of Logic Elements/cells: 68416
• Number Of Labs/clbs: 4276
• Total Ram Bits: 1152000
• Number Of I /o: 622
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 896-FBGA
• For Use With: P0304 - DE2-70 CALL FOR ACADEMIC PRICING544-1703 - VIDEO KIT W/CYCLONE II EP2C70N544-1699 - DSP KIT W/CYCLONE II EPS2C70N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Other names: 544-2145

Operating Conditions
5–2
Cyclone II Device Handbook, Volume 1
Notes to
(1)
(2)
(3)
V
V
T
Table 5–2. Recommended Operating Conditions
J
CCINT
CCIO
Symbol
The V
and 2 ms for A devices.
The V
recommended V
specific to the differential standards is given in
The minimum and maximum values of 3.0 V and 3.6 V, respectively, for V
I/O standards. Refer to
(2)
Table
CC
CCIO
must rise monotonically. The maximum V
range given here spans the lowest and highest operating voltages of all supported I/O standards. The
5–2:
Supply voltage for internal
logic and input buffers
Supply voltage for output
buffers, 3.3-V operation
Supply voltage for output
buffers, 2.5-V operation
Supply voltage for output
buffers, 1.8-V operation
Supply voltage for output
buffers, 1.5-V operation
Operating junction
temperature
CCIO
range specific to each of the single-ended I/O standards is given in
Parameter
Table 5–6
Table 5–2
devices. It shows the allowed voltage ranges for V
operating junction temperature (T
powered by V
dedicated clock pins are powered by V
input buffers are powered by both V
for the voltage range of other I/O standards.
specifies the recommended operating conditions for Cyclone II
CCIO
Table
For commercial use
For industrial use
For extended
temperature use
For automotive use
only. The LVDS and LVPECL input buffers on
CC
Conditions
(both V
5–8.
(1)
(1)
(1)
(1)
(1)
CCIO
and V
J
). The LVTTL and LVCMOS inputs are
CCINT
CCINT
3.135 (3.00)
CCINT
Minimum
CCIO
) rise time is 100 ms for non-A devices
2.375
1.425
1.15
1.71
–40
–40
–40
and V
0
only applies to the PCI and PCI-X
. The SSTL, HSTL, LVDS
CCIO
CCINT
Table
.
3.465 (3.60)
Maximum
Altera Corporation
, V
2.625
1.575
1.25
1.89
100
125
125
(3)
85
5–6, and those
CCIO
February 2008
, and the
Unit
°C
°C
°C
°C
V
V
V
V
V