EP4CGX150CF23I7N Altera, EP4CGX150CF23I7N Datasheet - Page 39

• Manufacturer Part Number: EP4CGX150CF23I7N
• Description: IC CYCLONE IV FPGA 150K 484FBGA
• Manufacturer: Altera
• Series: CYCLONE® IV GXr

Specifications of EP4CGX150CF23I7N

• Number Of Logic Elements/cells: 149760
• Number Of Labs/clbs: 9360
• Total Ram Bits: 6480000
• Number Of I /o: 270
• Voltage - Supply: 1.16 V ~ 1.24 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 484-FBGA
• Family Name: Cyclone IV
• Number Of Logic Blocks/elements: 149760
• # I/os (max): 270
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 149760
• Ram Bits: 6635520
• Operating Supply Voltage (min): 1.16V
• Operating Supply Voltage (max): 1.24V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 484
• Package Type: FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 1: Cyclone IV Device Datasheet
Glossary
Table 1–46. Glossary (Part 2 of 5)
© December 2010 Altera Corporation
Letter
Q
R
P
PLL Block
R
Receiver Input
Waveform
Receiver input
skew margin
(RSKM)
L
Term
—
The following highlights the PLL specification parameters:
Receiver differential input discrete resistor (external to Cyclone IV devices).
Receiver input waveform for LVDS and LVPECL differential standards:
High-speed I/O block: The total margin left after accounting for the sampling window and TCCS.
RSKM = (TUI – SW – TCCS) / 2.
Core Clock
Key
CLK
Single-Ended Waveform
Differential Waveform (Mathematical Function of Positive & Negative Channel)
Reconfigurable in User Mode
V
CM
V
Switchover
ID
f
IN
N
V
ID
f
INPFD
Definitions
PFD
—
M
CP
Phase tap
LF
Cyclone IV Device Handbook, Volume 3
V
ID
VCO
Positive Channel (p) = V
Negative Channel (n) = V
Ground
0 V
f
p - n
VCO
Counters
C0..C4
CLKOUT Pins
f
f
OUT _EXT
OUT
IH
IL
GCLK
1–39