EP20K400EBC652-3N Altera, EP20K400EBC652-3N Datasheet - Page 6
![IC APEX 20KE FPGA 400K 652-BGA](/photos/6/73/67333/544-652-bga_sml.jpg)
EP20K400EBC652-3N
Manufacturer Part Number
EP20K400EBC652-3N
Description
IC APEX 20KE FPGA 400K 652-BGA
Manufacturer
Altera
Series
APEX-20K®r
Datasheet
1.EP20K30ETC144-3.pdf
(117 pages)
Specifications of EP20K400EBC652-3N
Number Of Logic Elements/cells
16640
Number Of Labs/clbs
1664
Total Ram Bits
212992
Number Of I /o
488
Number Of Gates
1052000
Voltage - Supply
1.71 V ~ 1.89 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
652-BGA
Family Name
APEX 20K
Number Of Usable Gates
400000
Number Of Logic Blocks/elements
16640
# I/os (max)
488
Frequency (max)
213MHz
Process Technology
SRAM
Operating Supply Voltage (typ)
1.8V
Logic Cells
16640
Ram Bits
212992
Device System Gates
1052000
Operating Supply Voltage (min)
1.71V
Operating Supply Voltage (max)
1.89V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
652
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
APEX 20K Programmable Logic Device Family Data Sheet
General
Description
6
APEX
architecture, which combines the strengths of LUT-based and product-
term-based devices with an enhanced memory structure. LUT-based logic
provides optimized performance and efficiency for data-path, register-
intensive, mathematical, or digital signal processing (DSP) designs.
Product-term-based logic is optimized for complex combinatorial paths,
such as complex state machines. LUT- and product-term-based logic
combined with memory functions and a wide variety of MegaCore and
AMPP functions make the APEX 20K device architecture uniquely suited
for system-on-a-programmable-chip designs. Applications historically
requiring a combination of LUT-, product-term-, and memory-based
devices can now be integrated into one APEX 20K device.
APEX 20KE devices are a superset of APEX 20K devices and include
additional features such as advanced I/O standard support, CAM,
additional global clocks, and enhanced ClockLock clock circuitry. In
addition, APEX 20KE devices extend the APEX 20K family to 1.5 million
gates. APEX 20KE devices are denoted with an “E” suffix in the device
name (e.g., the EP20K1000E device is an APEX 20KE device).
compares the features included in APEX 20K and APEX 20KE devices.
TM
20K devices are the first PLDs designed with the MultiCore
Altera Corporation
Table 8