EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 93

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EP2AGX65DF29C6N

Manufacturer Part Number
EP2AGX65DF29C6N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr

Specifications of EP2AGX65DF29C6N

Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
63250
# I/os (max)
364
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
63250
Ram Bits
5557452.8
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant

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EP2AGX65DF29C6N@@@@@
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© 2010 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX are Reg. U.S. Pat. & Tm. Off.
and/or trademarks of Altera Corporation in the U.S. and other countries. All other trademarks and service marks are the property of their respective holders as described at
www.altera.com/common/legal.html. Altera warrants performance of its semiconductor products to current specifications in accordance with Altera’s standard warranty, but
reserves the right to make changes to any products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any
information, product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
AIIGX53002-2.0
Highlights
High-Speed LVDS I/O with DPA and Soft CDR
Auto-Calibrating External Memory Interfaces
Connecting a Serial Configuration Device to an Arria II Device Family
on AS Interface
Document Revision History
Table 2–1. Document Revision History
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
December 2010
December 2010
AIIGX53002-2.0
December 2010
July 2010
March 2010
February 2010
Date
f
f
f
f
This chapter describes changes to the published version of the
Handbook.
main handbook chapters.
This information is now located in the
This information is now located in the
This information is now located in the
This information is now located in the
System Upgrades in Arria II Devices
Table 2–1
Version
2.0
1.2
1.1
1.0
lists the revision history for this chapter.
All changes from Revision 1.1 of this chapter are now incorporated in the
Added “Guidelines for Connecting Serial Configuration Device to Arria II GX Device
Family on AS Interface”
Initial release.
Updated chapter titles.
Moved the “Highlights”, “High-Speed LVDS I/O with DPA and Soft CDR”, and
“Auto-Calibrating External Memory Interfaces” sections to the
Arria II GX Device Family Overview chapter.
Moved the “Guidelines for Connecting Serial Configuration Device to Arria II GX
Device Family on AS Interface” section to the Configuration, Design Security, and
Remote System Upgrades in Arria II GX Devices chapter
2. Addendum for the Arria II Device
chapter.
Overview for the Arria II Device Family
Overview for the Arria II Device Family
Overview for the Arria II Device Family
Configuration, Design Security, and Remote
Changes
Arria II Device
Handbook
chapter.
chapter.
chapter.
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