EP1SGX25FF1020C7 Altera, EP1SGX25FF1020C7 Datasheet - Page 81
![no-image](/images/manufacturer_photos/0/0/40/altera_sml.jpg)
EP1SGX25FF1020C7
Manufacturer Part Number
EP1SGX25FF1020C7
Description
IC STRATIX GX FPGA 25K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet
1.EP1SGX10CF672C7N.pdf
(272 pages)
Specifications of EP1SGX25FF1020C7
Number Of Logic Elements/cells
25660
Number Of Labs/clbs
2566
Total Ram Bits
1944576
Number Of I /o
607
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP1SGX25FF1020C7ES
Manufacturer:
ALTERA
Quantity:
11
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Figure 4–10. C4 Interconnect Connections
Note to
(1)
Altera Corporation
February 2005
Each C4 interconnect can drive either up or down four rows.
Figure
Adjacent LAB can
drive onto neighboring
LAB's C4 interconnect
4–10:
Row
Interconnect
C8 interconnects span eight LABs, M512, or M4K blocks up or down from
a source LAB. Every LAB has its own set of C8 interconnects to drive
either up or down. C8 interconnect connections between the LABs in a
column are similar to the C4 connections shown in
exception that they connect to eight LABs above and below. The C8
Interconnect
Local
Note (1)
Stratix GX Device Handbook, Volume 1
C4 Interconnect
Driving Down
Stratix GX Architecture
Figure 4–10
C4 Interconnect
Drives Local and R4
Interconnects
up to Four Rows
C4 Interconnect
Driving Up
LAB
with the
4–15
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