EP1S25F1020C5 Altera, EP1S25F1020C5 Datasheet - Page 119

• Manufacturer Part Number: EP1S25F1020C5
• Description: IC STRATIX FPGA 25K LE 1020-FBGA
• Manufacturer: Altera
• Series: Stratix®r

Specifications of EP1S25F1020C5

• Number Of Logic Elements/cells: 25660
• Number Of Labs/clbs: 2566
• Total Ram Bits: 1944576
• Number Of I /o: 706
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1020-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Other names: 544-1857; EP1S25F1020C5

Figure 2–59. Stratix IOE Structure
Altera Corporation
July 2005
Logic Array
Output B
Output A
Input B
Input A
OE
Output Register
Output Register
The IOEs are located in I/O blocks around the periphery of the Stratix
device. There are up to four IOEs per row I/O block and six IOEs per
column I/O block. The row I/O blocks drive row, column, or direct link
interconnects. The column I/O blocks drive column interconnects.
Figure 2–60
Figure 2–61
D
D
Q
Q
shows how a row I/O block connects to the logic array.
shows how a column I/O block connects to the logic array.
CLK
OE Register
OE Register
D
D
Q
Q
Input Register
Input Register
Stratix Device Handbook, Volume 1
D
D
Q
Q
Input Latch
D
ENA
Stratix Architecture
Q
2–105