EP1SGX25DF1020C5 Altera, EP1SGX25DF1020C5 Datasheet - Page 113

• Manufacturer Part Number: EP1SGX25DF1020C5
• Description: IC STRATIX GX FPGA 25K 1020-FBGA
• Manufacturer: Altera
• Series: Stratix® GXr

Specifications of EP1SGX25DF1020C5

• Number Of Logic Elements/cells: 25660
• Number Of Labs/clbs: 2566
• Total Ram Bits: 1944576
• Number Of I /o: 607
• Voltage - Supply: 1.425 V ~ 1.575 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 1020-FBGA
• Family Name: Stratix GX
• Number Of Logic Blocks/elements: 25660
• # I/os (max): 607
• Frequency (max): 5GHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.5V
• Logic Cells: 25660
• Ram Bits: 1944576
• Operating Supply Voltage (min): 1.425V
• Operating Supply Voltage (max): 1.575V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 1020
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Not Compliant

Altera Corporation
February 2005
the capabilities for dynamic and mixed sign multiplications are handled
differently. The following list provides the largest functions that can fit
into a single DSP block.
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1
Figure 4–28
36
36
35
36
36
35
35
36
35
each operand are different
36
is used for both operands
×
×
×
×
×
×
×
×
×
×
36-bit unsigned by unsigned multiplication
36-bit signed by signed multiplication
36-bit unsigned by signed multiplication
35-bit signed by unsigned multiplication
35-bit signed by dynamic sign multiplication
36-bit dynamic sign by signed multiplication
36-bit unsigned by dynamic sign multiplication
35-bit dynamic sign by unsigned multiplication
35-bit dynamic sign multiplication when the sign controls for
36-bit dynamic sign multiplication when the same sign control
This list only shows functions that can fit into a single DSP block.
Multiple DSP blocks can support larger multiplication
functions.
shows one of the columns with surrounding LAB rows.
Stratix GX Device Handbook, Volume 1
Stratix GX Architecture
4–47