EP4SGX290KF40C3N Altera, EP4SGX290KF40C3N Datasheet - Page 70
EP4SGX290KF40C3N
Manufacturer Part Number
EP4SGX290KF40C3N
Description
IC STRATIX IV GX 290K 1517FBGA
Manufacturer
Altera
Series
Stratix® IV GXr
Datasheets
1.EP4SGX110DF29C3N.pdf
(80 pages)
2.EP4SGX110DF29C3N.pdf
(1154 pages)
3.EP4SGX110DF29C3N.pdf
(432 pages)
4.EP4SGX110DF29C3N.pdf
(22 pages)
5.EP4SGX110DF29C3N.pdf
(30 pages)
6.EP4SGX110DF29C3N.pdf
(72 pages)
Specifications of EP4SGX290KF40C3N
Number Of Logic Elements/cells
291200
Number Of Labs/clbs
11648
Total Ram Bits
17248
Number Of I /o
744
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1517-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Other names
544-2624
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
1–62
Stratix IV Device Handbook Volume 4: Device Datasheet and Addendum
Programmable Output Buffer Delay
Table 1–52
of the output buffer. The default delay is 0 ps.
Table 1–52. Programmable Output Buffer Delay
D
Note to
(1) You can set the programmable output buffer delay in the Quartus II software by setting the Output Buffer Delay
OUTBUF
Control assignment to either positive, negative, or both edges, with the specific values stated here (in ps) for the
Output Buffer Delay assignment.
Table
Symbol
lists the delay chain settings that control the rising and falling edge delays
1–52:
Rising and/or falling edge
delay
Parameter
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
(Note 1)
0 (default)
Typical
100
150
50
April 2011 Altera Corporation
Unit
ps
ps
ps
ps
I/O Timing